arm64: Convert ID_AA64MMFR0_EL1.TGRAN{4,16,64}_2 to UnsignedEnum

ID_AA64MMFR0_EL1.TGRAN{4,16,64}_2 are currently represented as unordered
enumerations. However, the architecture treats them as Unsigned,
as hinted to by the MRS data:

(FEAT_S2TGran4K <=> (((UInt(ID_AA64MMFR0_EL1.TGran4_2) == 0) &&
		       FEAT_TGran4K) ||
		     (UInt(ID_AA64MMFR0_EL1.TGran4_2) >= 2))))

and similar descriptions exist for 16 and 64k.

This is also confirmed by D24.1.3.3 ("Alternative ID scheme used for
ID_AA64MMFR0_EL1 stage 2 granule sizes") in the L.b revision of
the ARM ARM.

Turn these fields into UnsignedEnum so that we can use the above
description more or less literally.

Reviewed-by: Fuad Tabba <tabba@google.com>
Tested-by: Fuad Tabba <tabba@google.com>
Link: https://patch.msgid.link/20251210173024.561160-3-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 8921b51866d64c71c8b7585cf0da6012a6b04236..063b13b7c7319fea6fed24566d5bf9b4f0f2b078 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2098,18 +2098,18 @@ UnsignedEnum    47:44   EXS
        0b0000  NI
        0b0001  IMP
 EndEnum
-Enum   43:40   TGRAN4_2
+UnsignedEnum   43:40   TGRAN4_2
        0b0000  TGRAN4
        0b0001  NI
        0b0010  IMP
        0b0011  52_BIT
 EndEnum
-Enum   39:36   TGRAN64_2
+UnsignedEnum   39:36   TGRAN64_2
        0b0000  TGRAN64
        0b0001  NI
        0b0010  IMP
 EndEnum
-Enum   35:32   TGRAN16_2
+UnsignedEnum   35:32   TGRAN16_2
        0b0000  TGRAN16
        0b0001  NI
        0b0010  IMP