]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
ARM: dts: stm32: fix usart 2 & 3 pinconf to wake up with flow control
authorValentin CARON - foss <valentin.caron@foss.st.com>
Thu, 11 Feb 2021 11:07:03 +0000 (12:07 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 14 May 2021 08:49:38 +0000 (10:49 +0200)
[ Upstream commit a1429f3d3029b65cd4032f6218d5290911377ce4 ]

Modify usart 2 & 3 pins to allow wake up from low power mode while the
hardware flow control is activated. UART RTS pin need to stay configure
in idle mode to receive characters in order to wake up.

Fixes: 842ed898a757 ("ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl")
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi

index 20a59e8f7a33fc380832e4a880471dbfdfd14f57..f10a740ca3c15fd1e7b7b6a02efccf99c611cd80 100644 (file)
        usart2_idle_pins_c: usart2-idle-2 {
                pins1 {
                        pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
-                                <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
                                 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
                };
                pins2 {
+                       pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <3>;
+               };
+               pins3 {
                        pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
                        bias-disable;
                };
        usart3_idle_pins_b: usart3-idle-1 {
                pins1 {
                        pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
-                                <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
                                 <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
                };
                pins2 {
+                       pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+               pins3 {
                        pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
                        bias-disable;
                };
        usart3_idle_pins_c: usart3-idle-2 {
                pins1 {
                        pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
-                                <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
                                 <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
                };
                pins2 {
+                       pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+               pins3 {
                        pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
                        bias-disable;
                };