return res;
}
+/* S-widen 8/16/32/64 bit int expr to 64. */
+static IRExpr* widenSto64 ( IRType srcTy, IRExpr* e )
+{
+ switch (srcTy) {
+ case Ity_I64: return e;
+ case Ity_I32: return unop(Iop_32Sto64, e);
+ case Ity_I16: return unop(Iop_16Sto64, e);
+ case Ity_I8: return unop(Iop_8Sto64, e);
+ default: vpanic("widenSto64(arm64)");
+ }
+}
+
/* U-widen 8/16/32/64 bit int expr to 64. */
static IRExpr* widenUto64 ( IRType srcTy, IRExpr* e )
{
return True;
}
+ /* ---------------- ARMv8.1-LSE: Atomic Memory Operations ---------------- */
+ /* 31 29 23 22 21 20 15 11 9 4
+ sz 111000 A R 1 s 0000 00 n t LDADD{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>]
+ sz 111000 A R 1 s 0001 00 n t LDCLR{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>]
+ sz 111000 A R 1 s 0010 00 n t LDEOR{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>]
+ sz 111000 A R 1 s 0011 00 n t LDSET{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>]
+ sz 111000 A R 1 s 0100 00 n t LDSMAX{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>]
+ sz 111000 A R 1 s 0101 00 n t LDSMIN{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>]
+ sz 111000 A R 1 s 0110 00 n t LDUMAX{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>]
+ sz 111000 A R 1 s 0111 00 n t LDUMIN{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>]
+ sz 111000 A R 1 s 1000 00 n t SWP{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>]
+ */
+ if (INSN(29,24) == BITS6(1,1,1,0,0,0)
+ && INSN(21,21) == 1
+ && (INSN(15,12) <= BITS4(1,0,0,0))
+ && INSN(11,10) == BITS2(0,0)) {
+ UInt szBlg2 = INSN(31,30);
+ Bool isAcq = INSN(23,23) == 1;
+ Bool isRel = INSN(22,22) == 1;
+ UInt ss = INSN(20,16);
+ UInt opc = INSN(15,12);
+ UInt nn = INSN(9,5);
+ UInt tt = INSN(4,0);
+
+ const HChar* nm = NULL;
+ const HChar* suffix[4] = { "b", "h", "", "" };
+
+ vassert(szBlg2 < 4);
+ UInt szB = 1 << szBlg2; /* 1, 2, 4 or 8 bytes*/
+ IRType ty = integerIRTypeOfSize(szB);
+ Bool is64 = szB == 8;
+ Bool isSigned = (opc == 4) || (opc == 5) /*smax || smin*/;
+
+ // IR used to emulate these atomic memory ops:
+ // 1) barrier
+ // 2) load
+ // 3) widen operands and do arithmetic/logic op
+ // 4) cas to see if target memory updated
+ // 5) barrier
+ // 6) repeat from 1) if cas says target memory not updated
+ // 7) update register
+
+ IRTemp ea = newTemp(Ity_I64);
+ assign(ea, getIReg64orSP(nn));
+
+ // Insert barrier before loading for acquire and acquire-release variants:
+ // A and AL.
+ if (isAcq && (tt != 31))
+ stmt(IRStmt_MBE(Imbe_Fence));
+
+ // Load LHS from memory, RHS from register.
+ IRTemp orig = newTemp(ty);
+ assign(orig, loadLE(ty, mkexpr(ea)));
+ IRExpr *lhs = mkexpr(orig);
+ IRExpr *rhs = narrowFrom64(ty, getIReg64orZR(ss));
+ IRExpr *res = NULL;
+
+ lhs = isSigned ? widenSto64(ty, lhs) : widenUto64(ty, lhs);
+ rhs = isSigned ? widenSto64(ty, rhs) : widenUto64(ty, rhs);
+
+ // Perform the operation.
+ switch (opc) {
+ case 0:
+ nm = "ldadd";
+ res = binop(Iop_Add64, lhs, rhs);
+ break;
+ case 1:
+ nm = "ldclr";
+ res = binop(Iop_And64, lhs, unop(mkNOT(Ity_I64), rhs));
+ break;
+ case 2:
+ nm = "ldeor";
+ res = binop(Iop_Xor64, lhs, rhs);
+ break;
+ case 3:
+ nm = "ldset";
+ res = binop(Iop_Or64, lhs, rhs);
+ break;
+ case 4:
+ nm = "ldsmax";
+ res = IRExpr_ITE(binop(Iop_CmpLT64S, lhs, rhs), rhs, lhs);
+ break;
+ case 5:
+ nm = "ldsmin";
+ res = IRExpr_ITE(binop(Iop_CmpLT64S, lhs, rhs), lhs, rhs);
+ break;
+ case 6:
+ nm = "ldumax";
+ res = IRExpr_ITE(binop(Iop_CmpLT64U, lhs, rhs), rhs, rhs);
+ break;
+ case 7:
+ nm = "ldumin";
+ res = IRExpr_ITE(binop(Iop_CmpLT64U, lhs, rhs), lhs, rhs);
+ break;
+ case 8:
+ nm = "swp";
+ res = lhs;
+ break;
+ default:
+ vassert(0);
+ break;
+ }
+
+ // Store the result back if LHS remains unchanged in memory.
+ IRTemp old = newTemp(ty);
+ stmt( IRStmt_CAS(mkIRCAS(/*oldHi*/IRTemp_INVALID, old,
+ Iend_LE, mkexpr(ea),
+ /*expdHi*/NULL, mkexpr(orig),
+ /*dataHi*/NULL, narrowFrom64(ty, res))) );
+
+ // Insert barrier after storing for release and acquire-release variants:
+ // L and AL.
+ if (isRel)
+ stmt(IRStmt_MBE(Imbe_Fence));
+
+ // Retry if the CAS failed (i.e. when old != orig).
+ IRConst* nia = IRConst_U64(guest_PC_curr_instr);
+ stmt( IRStmt_Exit(
+ binop(Iop_CasCmpNE64,
+ widenUto64(ty, mkexpr(old)),
+ widenUto64(ty, mkexpr(orig))),
+ Ijk_Boring, nia, OFFB_PC ));
+ // Otherwise we succeeded.
+ putIReg64orZR(tt, widenUto64(ty, mkexpr(old)));
+
+ DIP("%s%s%s%s %s, %s, [%s]\n", nm, isAcq ? "a" : "", isRel ? "l" : "",
+ suffix[szBlg2], nameIRegOrZR(is64, ss), nameIRegOrZR(is64, tt),
+ nameIReg64orSP(nn));
+ return True;
+ }
+
vex_printf("ARM64 front end: load_store\n");
return False;
# undef INSN
|| e->Iex.Binop.op == Iop_CmpLT64U
|| e->Iex.Binop.op == Iop_CmpLE64S
|| e->Iex.Binop.op == Iop_CmpLE64U
- || e->Iex.Binop.op == Iop_CasCmpEQ64)) {
+ || e->Iex.Binop.op == Iop_CasCmpEQ64
+ || e->Iex.Binop.op == Iop_CasCmpNE64)) {
HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1);
ARM64RIA* argR = iselIntExpr_RIA(env, e->Iex.Binop.arg2);
addInstr(env, ARM64Instr_Cmp(argL, argR, True/*is64*/));
switch (e->Iex.Binop.op) {
case Iop_CmpEQ64: case Iop_CasCmpEQ64: return ARM64cc_EQ;
- case Iop_CmpNE64: return ARM64cc_NE;
+ case Iop_CmpNE64: case Iop_CasCmpNE64: return ARM64cc_NE;
case Iop_CmpLT64S: return ARM64cc_LT;
case Iop_CmpLT64U: return ARM64cc_CC;
case Iop_CmpLE64S: return ARM64cc_LE;
|| e->Iex.Binop.op == Iop_CmpLT32U
|| e->Iex.Binop.op == Iop_CmpLE32S
|| e->Iex.Binop.op == Iop_CmpLE32U
- || e->Iex.Binop.op == Iop_CasCmpEQ32)) {
+ || e->Iex.Binop.op == Iop_CasCmpEQ32
+ || e->Iex.Binop.op == Iop_CasCmpNE32)) {
HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1);
ARM64RIA* argR = iselIntExpr_RIA(env, e->Iex.Binop.arg2);
addInstr(env, ARM64Instr_Cmp(argL, argR, False/*!is64*/));
switch (e->Iex.Binop.op) {
case Iop_CmpEQ32: case Iop_CasCmpEQ32: return ARM64cc_EQ;
- case Iop_CmpNE32: return ARM64cc_NE;
+ case Iop_CmpNE32: case Iop_CasCmpNE32: return ARM64cc_NE;
case Iop_CmpLT32S: return ARM64cc_LT;
case Iop_CmpLT32U: return ARM64cc_CC;
case Iop_CmpLE32S: return ARM64cc_LE;
/* --- Cmp*16*(x,y) --- */
if (e->tag == Iex_Binop
- && (e->Iex.Binop.op == Iop_CasCmpEQ16)) {
+ && (e->Iex.Binop.op == Iop_CasCmpEQ16
+ || e->Iex.Binop.op == Iop_CasCmpNE16)) {
HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1);
HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2);
HReg argL2 = widen_z_16_to_64(env, argL);
addInstr(env, ARM64Instr_Cmp(argL2, ARM64RIA_R(argR2), True/*is64*/));
switch (e->Iex.Binop.op) {
case Iop_CasCmpEQ16: return ARM64cc_EQ;
+ case Iop_CasCmpNE16: return ARM64cc_NE;
default: vpanic("iselCondCode(arm64): CmpXX16");
}
}
/* --- Cmp*8*(x,y) --- */
if (e->tag == Iex_Binop
- && (e->Iex.Binop.op == Iop_CasCmpEQ8)) {
+ && (e->Iex.Binop.op == Iop_CasCmpEQ8
+ || e->Iex.Binop.op == Iop_CasCmpNE8)) {
HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1);
HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2);
HReg argL2 = widen_z_8_to_64(env, argL);
addInstr(env, ARM64Instr_Cmp(argL2, ARM64RIA_R(argR2), True/*is64*/));
switch (e->Iex.Binop.op) {
case Iop_CasCmpEQ8: return ARM64cc_EQ;
+ case Iop_CasCmpNE8: return ARM64cc_NE;
default: vpanic("iselCondCode(arm64): CmpXX8");
}
}
AM_CONDITIONAL(BUILD_ARMV8_CRC_TESTS, test x$ac_have_armv8_crc_feature = xyes)
+# Does the C compiler support the armv81 flag and the assembler v8.1 instructions
+# Note, this doesn't generate a C-level symbol. It generates a
+# automake-level symbol (BUILD_ARMV81_TESTS), used in test Makefile.am's
+AC_MSG_CHECKING([if gcc supports the armv81 feature flag and assembler supports v8.1 instructions])
+
+save_CFLAGS="$CFLAGS"
+CFLAGS="$CFLAGS -march=armv8.1-a -Werror"
+AC_COMPILE_IFELSE([AC_LANG_SOURCE([[
+int main()
+{
+ __asm__ __volatile__("ldadd x0, x1, [x2]" ::: "memory");
+ return 0;
+}
+]])], [
+ac_have_armv81_feature=yes
+AC_MSG_RESULT([yes])
+], [
+ac_have_armv81_feature=no
+AC_MSG_RESULT([no])
+])
+CFLAGS="$save_CFLAGS"
+
+AM_CONDITIONAL(BUILD_ARMV81_TESTS, test x$ac_have_armv81_feature = xyes)
+
+
# XXX JRS 2010 Oct 13: what is this for? For sure, we don't need this
# when building the tool executables. I think we should get rid of it.
#
cvtf_imm.stdout.exp cvtf_imm.stderr.exp cvtf_imm.vgtest \
fp_and_simd.stdout.exp fp_and_simd.stderr.exp fp_and_simd.vgtest \
integer.stdout.exp integer.stderr.exp integer.vgtest \
- memory.stdout.exp memory.stderr.exp memory.vgtest
+ memory.stdout.exp memory.stderr.exp memory.vgtest \
+ atomics_v81.stdout.exp atomics_v81.stderr.exp atomics_v81.vgtest
check_PROGRAMS = \
allexec \
cvtf_imm \
fp_and_simd \
integer \
- memory
+ memory \
+ atomics_v81
if BUILD_ARMV8_CRC_TESTS
check_PROGRAMS += crc32
endif
+if BUILD_ARMV81_TESTS
+ check_PROGRAMS += atomics_v81
+endif
+
AM_CFLAGS += @FLAG_M64@
AM_CXXFLAGS += @FLAG_M64@
AM_CCASFLAGS += @FLAG_M64@
allexec_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@
crc32_CFLAGS = $(AM_CFLAGS) -march=armv8-a+crc
+atomics_v81_CFLAGS = $(AM_CFLAGS) -march=armv8.1-a
fp_and_simd_CFLAGS = $(AM_CFLAGS) -march=armv8-a+crypto
integer_CFLAGS = $(AM_CFLAGS) -g -O0 -DTEST_BFM=0
--- /dev/null
+
+/* To compile:
+ aarch64-linux-gnu-gcc -march=armv8.1-a -Wall -g -O0 -o atomics_v8.1 \
+ none/tests/arm64/atomics_v8.1.c
+*/
+
+#include <stdio.h>
+#include <malloc.h>
+#include <stdint.h>
+
+typedef unsigned char UChar;
+typedef unsigned int UInt;
+typedef signed int Int;
+typedef unsigned short int UShort;
+typedef unsigned long long int ULong;
+typedef signed long long int Long;
+
+
+#define CHECK(name, check_expr, size) \
+static void name ## _check_ ## size(int ## size ## _t mval, int ## size ## _t rval, int ## size ## _t mval_after) \
+{ \
+ if ((int ## size ## _t)mval_after != ((int ## size ## _t)mval check_expr (int ## size ## _t)rval)) \
+ printf("FAIL: mem after != mem before %s rs ", #check_expr); \
+}
+
+CHECK(add, +, 64);
+CHECK(add, +, 16);
+CHECK(add, +, 8);
+CHECK(clr, & ~, 64);
+CHECK(eor, ^, 64);
+
+#define ATOMIC_TEST1(instruction, base_addr, mem_val_, rs_, chkfunc, size) \
+{ \
+ ULong rs = (ULong)rs_; \
+ ULong mem_val = (ULong)mem_val_; \
+ \
+ ULong mem_val_after, rt; \
+ mem_val_after = rt = 0ULL; \
+ printf("%s :: rs %016llx rt %016llx rn mem %016llx\n", \
+ instruction, rs, rt, mem_val); \
+ \
+ __asm__ __volatile__( \
+ "mov x5, %2;" \
+ "mov x13, %3;" \
+ "str x13, [x5, #0];" \
+ "mov x11, %4;" \
+ instruction ";" \
+ "ldr %0, [x5, #0];" \
+ "mov %1, x12;" \
+ : "=&r" (mem_val_after), "=&r" (rt) \
+ : "r" (base_addr), "r" (mem_val) , "r" (rs) \
+ : "x5", "x11", "x12", "x13", "memory" \
+ ); \
+ printf("%s :: rs %016llx rt %016llx rn mem %016llx ", \
+ instruction, rs, rt, mem_val_after); \
+ chkfunc ## _check_ ## size(mem_val, rs, mem_val_after); \
+ if (rt != mem_val) \
+ printf("FAIL: rt != mem before"); \
+ printf("\n\n"); \
+}
+
+// Test patterns
+#define ALL5s_64 0x5555555555555555ULL
+#define ALLas_64 0xAAAAAAAAAAAAAAAAULL
+#define ALLfs_64 0xFFFFFFFFFFFFFFFFULL
+#define UP_64 0x0123456789ABCDEFULL
+#define DOWN_64 0xFEDCBA9876543210ULL
+#define PI_64 0x3141592653589793ULL
+#define E_64 0x2718281828459045ULL
+
+#define ALL5s_32 0x55555555ULL
+#define ALLas_32 0xAAAAAAAAULL
+#define ALLfs_32 0xFFFFFFFFULL
+#define UP_32 0x01234567ULL
+#define DOWN_32 0xFEDCBA98ULL
+#define PI_32 0x31415926ULL
+#define E_32 0x27182818ULL
+
+#define ALL5s_16 0x5555ULL
+#define ALLas_16 0xAAAAULL
+#define ALLfs_16 0xFFFFULL
+#define UP_16 0x0123ULL
+#define DOWN_16 0xFEDCULL
+#define PI_16 0x3141ULL
+#define E_16 0x2718ULL
+
+#define ALL5s_8 0x55ULL
+#define ALLas_8 0xAAULL
+#define ALLfs_8 0xFFULL
+#define UP_8 0x01ULL
+#define DOWN_8 0xFEULL
+#define PI_8 0x31ULL
+#define E_8 0x27ULL
+
+static __attribute((noinline)) void test_atomics ( void )
+{
+ ULong *mem = (ULong *)malloc(sizeof(ULong));
+
+ printf("LDADD <Xs>, <Xt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, 0, 0, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, 1, 1, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, 1, -1, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, -1, 1, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, -1, -1, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, 0, UP_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, UP_64, 0, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, UP_64, UP_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, 0, DOWN_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, DOWN_64, 0, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, DOWN_64, DOWN_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, 0, ALL5s_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, ALL5s_64, 0, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, ALL5s_64, ALL5s_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, 0, ALLas_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, ALLas_64, 0, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, ALLas_64, ALLas_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, 0, PI_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, PI_64, 0, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, PI_64, PI_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, 0, E_64, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, E_64, 0, add, 64);
+ ATOMIC_TEST1("ldadd x11, x12, [x5]", mem, E_64, E_64, add, 64);
+
+ printf("LDADDA <Xs>, <Xt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, 0, 0, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, 1, 1, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, 1, -1, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, -1, 1, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, -1, -1, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, 0, UP_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, UP_64, 0, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, UP_64, UP_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, 0, DOWN_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, DOWN_64, 0, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, DOWN_64, DOWN_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, 0, ALL5s_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, ALL5s_64, 0, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, ALL5s_64, ALL5s_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, 0, ALLas_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, ALLas_64, 0, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, ALLas_64, ALLas_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, 0, PI_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, PI_64, 0, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, PI_64, PI_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, 0, E_64, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, E_64, 0, add, 64);
+ ATOMIC_TEST1("ldadda x11, x12, [x5]", mem, E_64, E_64, add, 64);
+
+ printf("LDADDL <Ws>, <Wt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, 0, 0, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, 1, 1, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, 1, -1, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, -1, 1, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, -1, -1, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, 0, UP_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, UP_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, UP_64, UP_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, 0, DOWN_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, DOWN_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, DOWN_64, DOWN_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, 0, ALL5s_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, ALL5s_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, ALL5s_64, ALL5s_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, 0, ALLas_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, ALLas_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, ALLas_64, ALLas_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, 0, PI_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, PI_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, PI_64, PI_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, 0, E_64, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, E_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddl x11, x12, [x5]", mem, E_64, E_64, add, 64);
+
+ printf("LDADDAL <Xs>, <Xt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, 0, 0, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, 1, 1, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, 1, -1, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, -1, 1, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, -1, -1, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, 0, UP_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, UP_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, UP_64, UP_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, 0, DOWN_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, DOWN_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, DOWN_64, DOWN_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, 0, ALL5s_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, ALL5s_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, ALL5s_64, ALL5s_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, 0, ALLas_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, ALLas_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, ALLas_64, ALLas_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, 0, PI_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, PI_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, PI_64, PI_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, 0, E_64, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, E_64, 0, add, 64);
+ ATOMIC_TEST1("ldaddal x11, x12, [x5]", mem, E_64, E_64, add, 64);
+
+ printf("LDADDH <Ws>, <Wt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 0, 0, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 0, 1, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 1, 0, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 1, 1, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 1, ALLfs_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, ALLfs_16, 1, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, ALLfs_16, ALLfs_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 0, UP_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, UP_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, UP_16, UP_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 0, DOWN_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, DOWN_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, DOWN_16, DOWN_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 0, ALL5s_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, ALL5s_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 0, ALLas_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, ALLas_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 0, PI_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, PI_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, PI_16, PI_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, 0, E_16, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, E_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddh w11, w12, [x5]", mem, E_16, E_16, add, 16);
+
+ printf("LDADDAH <Ws>, <Wt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 0, 0, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 0, 1, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 1, 0, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 1, 1, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 1, ALLfs_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, ALLfs_16, 1, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, ALLfs_16, ALLfs_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 0, UP_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, UP_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, UP_16, UP_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 0, DOWN_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, DOWN_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, DOWN_16, DOWN_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 0, ALL5s_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, ALL5s_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 0, ALLas_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, ALLas_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 0, PI_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, PI_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, PI_16, PI_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, 0, E_16, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, E_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddah w11, w12, [x5]", mem, E_16, E_16, add, 16);
+
+ printf("LDADDALH <Ws>, <Wt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 0, 0, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 0, 1, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 1, 0, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 1, 1, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 1, ALLfs_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, ALLfs_16, 1, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, ALLfs_16, ALLfs_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 0, UP_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, UP_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, UP_16, UP_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 0, DOWN_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, DOWN_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, DOWN_16, DOWN_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 0, ALL5s_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, ALL5s_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 0, ALLas_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, ALLas_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 0, PI_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, PI_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, PI_16, PI_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, 0, E_16, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, E_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddalh w11, w12, [x5]", mem, E_16, E_16, add, 16);
+
+ printf("LDADDLH <Ws>, <Wt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 0, 0, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 0, 1, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 1, 0, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 1, 1, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 1, ALLfs_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, ALLfs_16, 1, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, ALLfs_16, ALLfs_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 0, UP_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, UP_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, UP_16, UP_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 0, DOWN_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, DOWN_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, DOWN_16, DOWN_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 0, ALL5s_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, ALL5s_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 0, ALLas_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, ALLas_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 0, PI_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, PI_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, PI_16, PI_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, 0, E_16, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, E_16, 0, add, 16);
+ ATOMIC_TEST1("ldaddlh w11, w12, [x5]", mem, E_16, E_16, add, 16);
+
+ printf("LDADDB <Ws>, <Wt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 0, 0, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 0, 1, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 1, 0, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 1, 1, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 1, ALLfs_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, ALLfs_8, 1, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, ALLfs_8, ALLfs_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 0, UP_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, UP_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, UP_8, UP_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 0, DOWN_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, DOWN_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, DOWN_8, DOWN_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 0, ALL5s_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, ALL5s_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 0, ALLas_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, ALLas_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 0, PI_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, PI_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, PI_8, PI_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, 0, E_8, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, E_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddb w11, w12, [x5]", mem, E_8, E_8, add, 8);
+
+ printf("LDADDAB <Ws>, <Wt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 0, 0, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 0, 1, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 1, 0, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 1, 1, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 1, ALLfs_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, ALLfs_8, 1, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, ALLfs_8, ALLfs_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 0, UP_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, UP_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, UP_8, UP_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 0, DOWN_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, DOWN_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, DOWN_8, DOWN_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 0, ALL5s_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, ALL5s_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 0, ALLas_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, ALLas_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 0, PI_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, PI_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, PI_8, PI_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, 0, E_8, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, E_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddab w11, w12, [x5]", mem, E_8, E_8, add, 8);
+
+ printf("LDADDALB <Ws>, <Wt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 0, 0, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 0, 1, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 1, 0, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 1, 1, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 1, ALLfs_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, ALLfs_8, 1, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, ALLfs_8, ALLfs_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 0, UP_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, UP_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, UP_8, UP_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 0, DOWN_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, DOWN_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, DOWN_8, DOWN_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 0, ALL5s_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, ALL5s_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 0, ALLas_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, ALLas_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 0, PI_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, PI_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, PI_8, PI_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, 0, E_8, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, E_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddalb w11, w12, [x5]", mem, E_8, E_8, add, 8);
+
+ printf("LDADDLB <Ws>, <Wt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 0, 0, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 0, 1, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 1, 0, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 1, 1, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 1, ALLfs_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, ALLfs_8, 1, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, ALLfs_8, ALLfs_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 0, UP_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, UP_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, UP_8, UP_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 0, DOWN_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, DOWN_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, DOWN_8, DOWN_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 0, ALL5s_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, ALL5s_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 0, ALLas_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, ALLas_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 0, PI_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, PI_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, PI_8, PI_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, 0, E_8, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, E_8, 0, add, 8);
+ ATOMIC_TEST1("ldaddlb w11, w12, [x5]", mem, E_8, E_8, add, 8);
+
+ printf("LDCLR <Xs>, <Xt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, 0, 0, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, 1, 1, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, 1, -1, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, -1, 1, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, -1, -1, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, 0, UP_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, UP_64, 0, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, UP_64, UP_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, 0, DOWN_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, DOWN_64, 0, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, DOWN_64, DOWN_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, 0, ALL5s_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, ALL5s_64, 0, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, ALL5s_64, ALL5s_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, 0, ALLas_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, ALLas_64, 0, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, ALLas_64, ALLas_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, 0, PI_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, PI_64, 0, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, PI_64, PI_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, 0, E_64, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, E_64, 0, clr, 64);
+ ATOMIC_TEST1("ldclr x11, x12, [x5]", mem, E_64, E_64, clr, 64);
+ // TODO: LDCLRA, LDCLRAL, LDCLRL
+ // LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB
+ // LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH
+
+ printf("LDEOR <Xs>, <Xt>, [<Xn|SP>]\n");
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, 0, 0, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, 1, 1, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, 1, -1, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, -1, 1, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, -1, -1, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, 0, UP_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, UP_64, 0, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, UP_64, UP_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, 0, DOWN_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, DOWN_64, 0, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, DOWN_64, DOWN_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, 0, ALL5s_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, ALL5s_64, 0, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, ALL5s_64, ALL5s_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, 0, ALLas_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, ALLas_64, 0, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, ALLas_64, ALLas_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, 0, PI_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, PI_64, 0, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, PI_64, PI_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, 0, E_64, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, E_64, 0, eor, 64);
+ ATOMIC_TEST1("ldeor x11, x12, [x5]", mem, E_64, E_64, eor, 64);
+ // TODO: LDEORA, LDEORAL, LDEORL
+ // LDEORB, LDEORAB, LDEORALB, LDEORLB
+ // LDEORH, LDEORAH, LDEORALH, LDEORLH
+
+ free(mem);
+}
+
+int main ( void )
+{
+ test_atomics();
+ return 0;
+}
--- /dev/null
+LDADD <Xs>, <Xt>, [<Xn|SP>]
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldadd x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldadd x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldadd x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem 0000000000000001
+ldadd x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000001 rn mem 0000000000000000
+
+ldadd x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem ffffffffffffffff
+ldadd x11, x12, [x5] :: rs 0000000000000001 rt ffffffffffffffff rn mem 0000000000000000
+
+ldadd x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem ffffffffffffffff
+ldadd x11, x12, [x5] :: rs ffffffffffffffff rt ffffffffffffffff rn mem fffffffffffffffe
+
+ldadd x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0000000000000000
+ldadd x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0123456789abcdef
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 0123456789abcdef rn mem 0123456789abcdef
+
+ldadd x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+ldadd x11, x12, [x5] :: rs 0123456789abcdef rt 0123456789abcdef rn mem 02468acf13579bde
+
+ldadd x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem 0000000000000000
+ldadd x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem fedcba9876543210
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt fedcba9876543210 rn mem fedcba9876543210
+
+ldadd x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+ldadd x11, x12, [x5] :: rs fedcba9876543210 rt fedcba9876543210 rn mem fdb97530eca86420
+
+ldadd x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 0000000000000000
+ldadd x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 5555555555555555
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 5555555555555555 rn mem 5555555555555555
+
+ldadd x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+ldadd x11, x12, [x5] :: rs 5555555555555555 rt 5555555555555555 rn mem aaaaaaaaaaaaaaaa
+
+ldadd x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem 0000000000000000
+ldadd x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt aaaaaaaaaaaaaaaa rn mem aaaaaaaaaaaaaaaa
+
+ldadd x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldadd x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt aaaaaaaaaaaaaaaa rn mem 5555555555555554
+
+ldadd x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 0000000000000000
+ldadd x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 3141592653589793
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 3141592653589793 rn mem 3141592653589793
+
+ldadd x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+ldadd x11, x12, [x5] :: rs 3141592653589793 rt 3141592653589793 rn mem 6282b24ca6b12f26
+
+ldadd x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 0000000000000000
+ldadd x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 2718281828459045
+ldadd x11, x12, [x5] :: rs 0000000000000000 rt 2718281828459045 rn mem 2718281828459045
+
+ldadd x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+ldadd x11, x12, [x5] :: rs 2718281828459045 rt 2718281828459045 rn mem 4e305030508b208a
+
+LDADDA <Xs>, <Xt>, [<Xn|SP>]
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldadda x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldadda x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldadda x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem 0000000000000001
+ldadda x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000001 rn mem 0000000000000000
+
+ldadda x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem ffffffffffffffff
+ldadda x11, x12, [x5] :: rs 0000000000000001 rt ffffffffffffffff rn mem 0000000000000000
+
+ldadda x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem ffffffffffffffff
+ldadda x11, x12, [x5] :: rs ffffffffffffffff rt ffffffffffffffff rn mem fffffffffffffffe
+
+ldadda x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0000000000000000
+ldadda x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0123456789abcdef
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 0123456789abcdef rn mem 0123456789abcdef
+
+ldadda x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+ldadda x11, x12, [x5] :: rs 0123456789abcdef rt 0123456789abcdef rn mem 02468acf13579bde
+
+ldadda x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem 0000000000000000
+ldadda x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem fedcba9876543210
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt fedcba9876543210 rn mem fedcba9876543210
+
+ldadda x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+ldadda x11, x12, [x5] :: rs fedcba9876543210 rt fedcba9876543210 rn mem fdb97530eca86420
+
+ldadda x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 0000000000000000
+ldadda x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 5555555555555555
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 5555555555555555 rn mem 5555555555555555
+
+ldadda x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+ldadda x11, x12, [x5] :: rs 5555555555555555 rt 5555555555555555 rn mem aaaaaaaaaaaaaaaa
+
+ldadda x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem 0000000000000000
+ldadda x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt aaaaaaaaaaaaaaaa rn mem aaaaaaaaaaaaaaaa
+
+ldadda x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldadda x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt aaaaaaaaaaaaaaaa rn mem 5555555555555554
+
+ldadda x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 0000000000000000
+ldadda x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 3141592653589793
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 3141592653589793 rn mem 3141592653589793
+
+ldadda x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+ldadda x11, x12, [x5] :: rs 3141592653589793 rt 3141592653589793 rn mem 6282b24ca6b12f26
+
+ldadda x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 0000000000000000
+ldadda x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 2718281828459045
+ldadda x11, x12, [x5] :: rs 0000000000000000 rt 2718281828459045 rn mem 2718281828459045
+
+ldadda x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+ldadda x11, x12, [x5] :: rs 2718281828459045 rt 2718281828459045 rn mem 4e305030508b208a
+
+LDADDL <Ws>, <Wt>, [<Xn|SP>]
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddl x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddl x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddl x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem 0000000000000001
+ldaddl x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddl x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem ffffffffffffffff
+ldaddl x11, x12, [x5] :: rs 0000000000000001 rt ffffffffffffffff rn mem 0000000000000000
+
+ldaddl x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem ffffffffffffffff
+ldaddl x11, x12, [x5] :: rs ffffffffffffffff rt ffffffffffffffff rn mem fffffffffffffffe
+
+ldaddl x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0000000000000000
+ldaddl x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0123456789abcdef
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 0123456789abcdef rn mem 0123456789abcdef
+
+ldaddl x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+ldaddl x11, x12, [x5] :: rs 0123456789abcdef rt 0123456789abcdef rn mem 02468acf13579bde
+
+ldaddl x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem 0000000000000000
+ldaddl x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem fedcba9876543210
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt fedcba9876543210 rn mem fedcba9876543210
+
+ldaddl x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+ldaddl x11, x12, [x5] :: rs fedcba9876543210 rt fedcba9876543210 rn mem fdb97530eca86420
+
+ldaddl x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 0000000000000000
+ldaddl x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 5555555555555555
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 5555555555555555 rn mem 5555555555555555
+
+ldaddl x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+ldaddl x11, x12, [x5] :: rs 5555555555555555 rt 5555555555555555 rn mem aaaaaaaaaaaaaaaa
+
+ldaddl x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem 0000000000000000
+ldaddl x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt aaaaaaaaaaaaaaaa rn mem aaaaaaaaaaaaaaaa
+
+ldaddl x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldaddl x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt aaaaaaaaaaaaaaaa rn mem 5555555555555554
+
+ldaddl x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 0000000000000000
+ldaddl x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 3141592653589793
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 3141592653589793 rn mem 3141592653589793
+
+ldaddl x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+ldaddl x11, x12, [x5] :: rs 3141592653589793 rt 3141592653589793 rn mem 6282b24ca6b12f26
+
+ldaddl x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 0000000000000000
+ldaddl x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 2718281828459045
+ldaddl x11, x12, [x5] :: rs 0000000000000000 rt 2718281828459045 rn mem 2718281828459045
+
+ldaddl x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+ldaddl x11, x12, [x5] :: rs 2718281828459045 rt 2718281828459045 rn mem 4e305030508b208a
+
+LDADDAL <Xs>, <Xt>, [<Xn|SP>]
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddal x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddal x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddal x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem 0000000000000001
+ldaddal x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddal x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem ffffffffffffffff
+ldaddal x11, x12, [x5] :: rs 0000000000000001 rt ffffffffffffffff rn mem 0000000000000000
+
+ldaddal x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem ffffffffffffffff
+ldaddal x11, x12, [x5] :: rs ffffffffffffffff rt ffffffffffffffff rn mem fffffffffffffffe
+
+ldaddal x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0000000000000000
+ldaddal x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0123456789abcdef
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 0123456789abcdef rn mem 0123456789abcdef
+
+ldaddal x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+ldaddal x11, x12, [x5] :: rs 0123456789abcdef rt 0123456789abcdef rn mem 02468acf13579bde
+
+ldaddal x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem 0000000000000000
+ldaddal x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem fedcba9876543210
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt fedcba9876543210 rn mem fedcba9876543210
+
+ldaddal x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+ldaddal x11, x12, [x5] :: rs fedcba9876543210 rt fedcba9876543210 rn mem fdb97530eca86420
+
+ldaddal x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 0000000000000000
+ldaddal x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 5555555555555555
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 5555555555555555 rn mem 5555555555555555
+
+ldaddal x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+ldaddal x11, x12, [x5] :: rs 5555555555555555 rt 5555555555555555 rn mem aaaaaaaaaaaaaaaa
+
+ldaddal x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem 0000000000000000
+ldaddal x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt aaaaaaaaaaaaaaaa rn mem aaaaaaaaaaaaaaaa
+
+ldaddal x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldaddal x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt aaaaaaaaaaaaaaaa rn mem 5555555555555554
+
+ldaddal x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 0000000000000000
+ldaddal x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 3141592653589793
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 3141592653589793 rn mem 3141592653589793
+
+ldaddal x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+ldaddal x11, x12, [x5] :: rs 3141592653589793 rt 3141592653589793 rn mem 6282b24ca6b12f26
+
+ldaddal x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 0000000000000000
+ldaddal x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 2718281828459045
+ldaddal x11, x12, [x5] :: rs 0000000000000000 rt 2718281828459045 rn mem 2718281828459045
+
+ldaddal x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+ldaddal x11, x12, [x5] :: rs 2718281828459045 rt 2718281828459045 rn mem 4e305030508b208a
+
+LDADDH <Ws>, <Wt>, [<Xn|SP>]
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddh w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000000 rn mem 0000000000000001
+ldaddh w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 000000000000ffff
+ldaddh w11, w12, [x5] :: rs 0000000000000001 rt 000000000000ffff rn mem 0000000000000000
+
+ldaddh w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000000 rn mem 000000000000ffff
+ldaddh w11, w12, [x5] :: rs 000000000000ffff rt 000000000000ffff rn mem 000000000000fffe
+
+ldaddh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000000
+ldaddh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000123
+
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000123
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000123 rn mem 0000000000000123
+
+ldaddh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000123
+ldaddh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000123 rn mem 0000000000000246
+
+ldaddh w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 0000000000000000
+ldaddh w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 000000000000fedc
+
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 000000000000fedc
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 000000000000fedc rn mem 000000000000fedc
+
+ldaddh w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 000000000000fedc
+ldaddh w11, w12, [x5] :: rs 000000000000fedc rt 000000000000fedc rn mem 000000000000fdb8
+
+ldaddh w11, w12, [x5] :: rs 0000000000005555 rt 0000000000000000 rn mem 0000000000000000
+ldaddh w11, w12, [x5] :: rs 0000000000005555 rt 0000000000000000 rn mem 0000000000005555
+
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000005555
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000005555 rn mem 0000000000005555
+
+ldaddh w11, w12, [x5] :: rs 000000000000aaaa rt 0000000000000000 rn mem 0000000000000000
+ldaddh w11, w12, [x5] :: rs 000000000000aaaa rt 0000000000000000 rn mem 000000000000aaaa
+
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 000000000000aaaa
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 000000000000aaaa rn mem 000000000000aaaa
+
+ldaddh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000000000
+ldaddh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000003141
+
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000003141
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000003141 rn mem 0000000000003141
+
+ldaddh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000003141
+ldaddh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000003141 rn mem 0000000000006282
+
+ldaddh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000000000
+ldaddh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000002718
+
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000002718
+ldaddh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000002718 rn mem 0000000000002718
+
+ldaddh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000002718
+ldaddh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000002718 rn mem 0000000000004e30
+
+LDADDAH <Ws>, <Wt>, [<Xn|SP>]
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddah w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddah w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddah w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddah w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddah w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000000 rn mem 0000000000000001
+ldaddah w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddah w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 000000000000ffff
+ldaddah w11, w12, [x5] :: rs 0000000000000001 rt 000000000000ffff rn mem 0000000000000000
+
+ldaddah w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000000 rn mem 000000000000ffff
+ldaddah w11, w12, [x5] :: rs 000000000000ffff rt 000000000000ffff rn mem 000000000000fffe
+
+ldaddah w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000000
+ldaddah w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000123
+
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000123
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000123 rn mem 0000000000000123
+
+ldaddah w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000123
+ldaddah w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000123 rn mem 0000000000000246
+
+ldaddah w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 0000000000000000
+ldaddah w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 000000000000fedc
+
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 000000000000fedc
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 000000000000fedc rn mem 000000000000fedc
+
+ldaddah w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 000000000000fedc
+ldaddah w11, w12, [x5] :: rs 000000000000fedc rt 000000000000fedc rn mem 000000000000fdb8
+
+ldaddah w11, w12, [x5] :: rs 0000000000005555 rt 0000000000000000 rn mem 0000000000000000
+ldaddah w11, w12, [x5] :: rs 0000000000005555 rt 0000000000000000 rn mem 0000000000005555
+
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000005555
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000005555 rn mem 0000000000005555
+
+ldaddah w11, w12, [x5] :: rs 000000000000aaaa rt 0000000000000000 rn mem 0000000000000000
+ldaddah w11, w12, [x5] :: rs 000000000000aaaa rt 0000000000000000 rn mem 000000000000aaaa
+
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 000000000000aaaa
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 000000000000aaaa rn mem 000000000000aaaa
+
+ldaddah w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000000000
+ldaddah w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000003141
+
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000003141
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000003141 rn mem 0000000000003141
+
+ldaddah w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000003141
+ldaddah w11, w12, [x5] :: rs 0000000000003141 rt 0000000000003141 rn mem 0000000000006282
+
+ldaddah w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000000000
+ldaddah w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000002718
+
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000002718
+ldaddah w11, w12, [x5] :: rs 0000000000000000 rt 0000000000002718 rn mem 0000000000002718
+
+ldaddah w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000002718
+ldaddah w11, w12, [x5] :: rs 0000000000002718 rt 0000000000002718 rn mem 0000000000004e30
+
+LDADDALH <Ws>, <Wt>, [<Xn|SP>]
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddalh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddalh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddalh w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000000 rn mem 0000000000000001
+ldaddalh w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 000000000000ffff
+ldaddalh w11, w12, [x5] :: rs 0000000000000001 rt 000000000000ffff rn mem 0000000000000000
+
+ldaddalh w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000000 rn mem 000000000000ffff
+ldaddalh w11, w12, [x5] :: rs 000000000000ffff rt 000000000000ffff rn mem 000000000000fffe
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000000
+ldaddalh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000123
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000123
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000123 rn mem 0000000000000123
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000123
+ldaddalh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000123 rn mem 0000000000000246
+
+ldaddalh w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 0000000000000000
+ldaddalh w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 000000000000fedc
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 000000000000fedc
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 000000000000fedc rn mem 000000000000fedc
+
+ldaddalh w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 000000000000fedc
+ldaddalh w11, w12, [x5] :: rs 000000000000fedc rt 000000000000fedc rn mem 000000000000fdb8
+
+ldaddalh w11, w12, [x5] :: rs 0000000000005555 rt 0000000000000000 rn mem 0000000000000000
+ldaddalh w11, w12, [x5] :: rs 0000000000005555 rt 0000000000000000 rn mem 0000000000005555
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000005555
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000005555 rn mem 0000000000005555
+
+ldaddalh w11, w12, [x5] :: rs 000000000000aaaa rt 0000000000000000 rn mem 0000000000000000
+ldaddalh w11, w12, [x5] :: rs 000000000000aaaa rt 0000000000000000 rn mem 000000000000aaaa
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 000000000000aaaa
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 000000000000aaaa rn mem 000000000000aaaa
+
+ldaddalh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000000000
+ldaddalh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000003141
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000003141
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000003141 rn mem 0000000000003141
+
+ldaddalh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000003141
+ldaddalh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000003141 rn mem 0000000000006282
+
+ldaddalh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000000000
+ldaddalh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000002718
+
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000002718
+ldaddalh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000002718 rn mem 0000000000002718
+
+ldaddalh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000002718
+ldaddalh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000002718 rn mem 0000000000004e30
+
+LDADDLH <Ws>, <Wt>, [<Xn|SP>]
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddlh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddlh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddlh w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000000 rn mem 0000000000000001
+ldaddlh w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 000000000000ffff
+ldaddlh w11, w12, [x5] :: rs 0000000000000001 rt 000000000000ffff rn mem 0000000000000000
+
+ldaddlh w11, w12, [x5] :: rs 000000000000ffff rt 0000000000000000 rn mem 000000000000ffff
+ldaddlh w11, w12, [x5] :: rs 000000000000ffff rt 000000000000ffff rn mem 000000000000fffe
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000000
+ldaddlh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000123
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000123
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000123 rn mem 0000000000000123
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000000 rn mem 0000000000000123
+ldaddlh w11, w12, [x5] :: rs 0000000000000123 rt 0000000000000123 rn mem 0000000000000246
+
+ldaddlh w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 0000000000000000
+ldaddlh w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 000000000000fedc
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 000000000000fedc
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 000000000000fedc rn mem 000000000000fedc
+
+ldaddlh w11, w12, [x5] :: rs 000000000000fedc rt 0000000000000000 rn mem 000000000000fedc
+ldaddlh w11, w12, [x5] :: rs 000000000000fedc rt 000000000000fedc rn mem 000000000000fdb8
+
+ldaddlh w11, w12, [x5] :: rs 0000000000005555 rt 0000000000000000 rn mem 0000000000000000
+ldaddlh w11, w12, [x5] :: rs 0000000000005555 rt 0000000000000000 rn mem 0000000000005555
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000005555
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000005555 rn mem 0000000000005555
+
+ldaddlh w11, w12, [x5] :: rs 000000000000aaaa rt 0000000000000000 rn mem 0000000000000000
+ldaddlh w11, w12, [x5] :: rs 000000000000aaaa rt 0000000000000000 rn mem 000000000000aaaa
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 000000000000aaaa
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 000000000000aaaa rn mem 000000000000aaaa
+
+ldaddlh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000000000
+ldaddlh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000003141
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000003141
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000003141 rn mem 0000000000003141
+
+ldaddlh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000000000 rn mem 0000000000003141
+ldaddlh w11, w12, [x5] :: rs 0000000000003141 rt 0000000000003141 rn mem 0000000000006282
+
+ldaddlh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000000000
+ldaddlh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000002718
+
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000002718
+ldaddlh w11, w12, [x5] :: rs 0000000000000000 rt 0000000000002718 rn mem 0000000000002718
+
+ldaddlh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000000000 rn mem 0000000000002718
+ldaddlh w11, w12, [x5] :: rs 0000000000002718 rt 0000000000002718 rn mem 0000000000004e30
+
+LDADDB <Ws>, <Wt>, [<Xn|SP>]
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddb w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000000 rn mem 0000000000000001
+ldaddb w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 00000000000000ff
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 00000000000000ff rn mem 0000000000000000
+
+ldaddb w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000000 rn mem 00000000000000ff
+ldaddb w11, w12, [x5] :: rs 00000000000000ff rt 00000000000000ff rn mem 00000000000000fe
+
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddb w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 0000000000000000
+ldaddb w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 00000000000000fe
+
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 00000000000000fe
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 00000000000000fe rn mem 00000000000000fe
+
+ldaddb w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 00000000000000fe
+ldaddb w11, w12, [x5] :: rs 00000000000000fe rt 00000000000000fe rn mem 00000000000000fc
+
+ldaddb w11, w12, [x5] :: rs 0000000000000055 rt 0000000000000000 rn mem 0000000000000000
+ldaddb w11, w12, [x5] :: rs 0000000000000055 rt 0000000000000000 rn mem 0000000000000055
+
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000055
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000055 rn mem 0000000000000055
+
+ldaddb w11, w12, [x5] :: rs 00000000000000aa rt 0000000000000000 rn mem 0000000000000000
+ldaddb w11, w12, [x5] :: rs 00000000000000aa rt 0000000000000000 rn mem 00000000000000aa
+
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 00000000000000aa
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 00000000000000aa rn mem 00000000000000aa
+
+ldaddb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000000
+ldaddb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000031
+
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000031
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000031 rn mem 0000000000000031
+
+ldaddb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000031
+ldaddb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000031 rn mem 0000000000000062
+
+ldaddb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000000
+ldaddb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000027
+
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000027
+ldaddb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000027 rn mem 0000000000000027
+
+ldaddb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000027
+ldaddb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000027 rn mem 000000000000004e
+
+LDADDAB <Ws>, <Wt>, [<Xn|SP>]
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddab w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000000 rn mem 0000000000000001
+ldaddab w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 00000000000000ff
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 00000000000000ff rn mem 0000000000000000
+
+ldaddab w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000000 rn mem 00000000000000ff
+ldaddab w11, w12, [x5] :: rs 00000000000000ff rt 00000000000000ff rn mem 00000000000000fe
+
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddab w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddab w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 0000000000000000
+ldaddab w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 00000000000000fe
+
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 00000000000000fe
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 00000000000000fe rn mem 00000000000000fe
+
+ldaddab w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 00000000000000fe
+ldaddab w11, w12, [x5] :: rs 00000000000000fe rt 00000000000000fe rn mem 00000000000000fc
+
+ldaddab w11, w12, [x5] :: rs 0000000000000055 rt 0000000000000000 rn mem 0000000000000000
+ldaddab w11, w12, [x5] :: rs 0000000000000055 rt 0000000000000000 rn mem 0000000000000055
+
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000055
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000055 rn mem 0000000000000055
+
+ldaddab w11, w12, [x5] :: rs 00000000000000aa rt 0000000000000000 rn mem 0000000000000000
+ldaddab w11, w12, [x5] :: rs 00000000000000aa rt 0000000000000000 rn mem 00000000000000aa
+
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 00000000000000aa
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 00000000000000aa rn mem 00000000000000aa
+
+ldaddab w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000000
+ldaddab w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000031
+
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000031
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000031 rn mem 0000000000000031
+
+ldaddab w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000031
+ldaddab w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000031 rn mem 0000000000000062
+
+ldaddab w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000000
+ldaddab w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000027
+
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000027
+ldaddab w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000027 rn mem 0000000000000027
+
+ldaddab w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000027
+ldaddab w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000027 rn mem 000000000000004e
+
+LDADDALB <Ws>, <Wt>, [<Xn|SP>]
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddalb w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000000 rn mem 0000000000000001
+ldaddalb w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 00000000000000ff
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 00000000000000ff rn mem 0000000000000000
+
+ldaddalb w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000000 rn mem 00000000000000ff
+ldaddalb w11, w12, [x5] :: rs 00000000000000ff rt 00000000000000ff rn mem 00000000000000fe
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddalb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddalb w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 0000000000000000
+ldaddalb w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 00000000000000fe
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 00000000000000fe
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 00000000000000fe rn mem 00000000000000fe
+
+ldaddalb w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 00000000000000fe
+ldaddalb w11, w12, [x5] :: rs 00000000000000fe rt 00000000000000fe rn mem 00000000000000fc
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000055 rt 0000000000000000 rn mem 0000000000000000
+ldaddalb w11, w12, [x5] :: rs 0000000000000055 rt 0000000000000000 rn mem 0000000000000055
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000055
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000055 rn mem 0000000000000055
+
+ldaddalb w11, w12, [x5] :: rs 00000000000000aa rt 0000000000000000 rn mem 0000000000000000
+ldaddalb w11, w12, [x5] :: rs 00000000000000aa rt 0000000000000000 rn mem 00000000000000aa
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 00000000000000aa
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 00000000000000aa rn mem 00000000000000aa
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000000
+ldaddalb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000031
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000031
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000031 rn mem 0000000000000031
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000031
+ldaddalb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000031 rn mem 0000000000000062
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000000
+ldaddalb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000027
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000027
+ldaddalb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000027 rn mem 0000000000000027
+
+ldaddalb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000027
+ldaddalb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000027 rn mem 000000000000004e
+
+LDADDLB <Ws>, <Wt>, [<Xn|SP>]
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddlb w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000000 rn mem 0000000000000001
+ldaddlb w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000001 rn mem 0000000000000000
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 00000000000000ff
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 00000000000000ff rn mem 0000000000000000
+
+ldaddlb w11, w12, [x5] :: rs 00000000000000ff rt 0000000000000000 rn mem 00000000000000ff
+ldaddlb w11, w12, [x5] :: rs 00000000000000ff rt 00000000000000ff rn mem 00000000000000fe
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000000
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000001
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000001 rn mem 0000000000000001
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldaddlb w11, w12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000002
+
+ldaddlb w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 0000000000000000
+ldaddlb w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 00000000000000fe
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 00000000000000fe
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 00000000000000fe rn mem 00000000000000fe
+
+ldaddlb w11, w12, [x5] :: rs 00000000000000fe rt 0000000000000000 rn mem 00000000000000fe
+ldaddlb w11, w12, [x5] :: rs 00000000000000fe rt 00000000000000fe rn mem 00000000000000fc
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000055 rt 0000000000000000 rn mem 0000000000000000
+ldaddlb w11, w12, [x5] :: rs 0000000000000055 rt 0000000000000000 rn mem 0000000000000055
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000055
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000055 rn mem 0000000000000055
+
+ldaddlb w11, w12, [x5] :: rs 00000000000000aa rt 0000000000000000 rn mem 0000000000000000
+ldaddlb w11, w12, [x5] :: rs 00000000000000aa rt 0000000000000000 rn mem 00000000000000aa
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 00000000000000aa
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 00000000000000aa rn mem 00000000000000aa
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000000
+ldaddlb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000031
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000031
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000031 rn mem 0000000000000031
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000000 rn mem 0000000000000031
+ldaddlb w11, w12, [x5] :: rs 0000000000000031 rt 0000000000000031 rn mem 0000000000000062
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000000
+ldaddlb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000027
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000027
+ldaddlb w11, w12, [x5] :: rs 0000000000000000 rt 0000000000000027 rn mem 0000000000000027
+
+ldaddlb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000000 rn mem 0000000000000027
+ldaddlb w11, w12, [x5] :: rs 0000000000000027 rt 0000000000000027 rn mem 000000000000004e
+
+LDCLR <Xs>, <Xt>, [<Xn|SP>]
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldclr x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem 0000000000000001
+ldclr x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000001 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem ffffffffffffffff
+ldclr x11, x12, [x5] :: rs 0000000000000001 rt ffffffffffffffff rn mem fffffffffffffffe
+
+ldclr x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem ffffffffffffffff
+ldclr x11, x12, [x5] :: rs ffffffffffffffff rt ffffffffffffffff rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0000000000000000
+ldclr x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0123456789abcdef
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 0123456789abcdef rn mem 0123456789abcdef
+
+ldclr x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+ldclr x11, x12, [x5] :: rs 0123456789abcdef rt 0123456789abcdef rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem 0000000000000000
+ldclr x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem fedcba9876543210
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt fedcba9876543210 rn mem fedcba9876543210
+
+ldclr x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+ldclr x11, x12, [x5] :: rs fedcba9876543210 rt fedcba9876543210 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 0000000000000000
+ldclr x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 5555555555555555
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 5555555555555555 rn mem 5555555555555555
+
+ldclr x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+ldclr x11, x12, [x5] :: rs 5555555555555555 rt 5555555555555555 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem 0000000000000000
+ldclr x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt aaaaaaaaaaaaaaaa rn mem aaaaaaaaaaaaaaaa
+
+ldclr x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldclr x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt aaaaaaaaaaaaaaaa rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 0000000000000000
+ldclr x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 3141592653589793
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 3141592653589793 rn mem 3141592653589793
+
+ldclr x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+ldclr x11, x12, [x5] :: rs 3141592653589793 rt 3141592653589793 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 0000000000000000
+ldclr x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 0000000000000000
+
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 2718281828459045
+ldclr x11, x12, [x5] :: rs 0000000000000000 rt 2718281828459045 rn mem 2718281828459045
+
+ldclr x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+ldclr x11, x12, [x5] :: rs 2718281828459045 rt 2718281828459045 rn mem 0000000000000000
+
+LDEOR <Xs>, <Xt>, [<Xn|SP>]
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0000000000000000
+
+ldeor x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem 0000000000000001
+ldeor x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000001 rn mem 0000000000000000
+
+ldeor x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem 0000000000000001
+ldeor x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000001 rn mem fffffffffffffffe
+
+ldeor x11, x12, [x5] :: rs 0000000000000001 rt 0000000000000000 rn mem ffffffffffffffff
+ldeor x11, x12, [x5] :: rs 0000000000000001 rt ffffffffffffffff rn mem fffffffffffffffe
+
+ldeor x11, x12, [x5] :: rs ffffffffffffffff rt 0000000000000000 rn mem ffffffffffffffff
+ldeor x11, x12, [x5] :: rs ffffffffffffffff rt ffffffffffffffff rn mem 0000000000000000
+
+ldeor x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0000000000000000
+ldeor x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 0123456789abcdef
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 0123456789abcdef rn mem 0123456789abcdef
+
+ldeor x11, x12, [x5] :: rs 0123456789abcdef rt 0000000000000000 rn mem 0123456789abcdef
+ldeor x11, x12, [x5] :: rs 0123456789abcdef rt 0123456789abcdef rn mem 0000000000000000
+
+ldeor x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem 0000000000000000
+ldeor x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem fedcba9876543210
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt fedcba9876543210 rn mem fedcba9876543210
+
+ldeor x11, x12, [x5] :: rs fedcba9876543210 rt 0000000000000000 rn mem fedcba9876543210
+ldeor x11, x12, [x5] :: rs fedcba9876543210 rt fedcba9876543210 rn mem 0000000000000000
+
+ldeor x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 0000000000000000
+ldeor x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 5555555555555555
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 5555555555555555 rn mem 5555555555555555
+
+ldeor x11, x12, [x5] :: rs 5555555555555555 rt 0000000000000000 rn mem 5555555555555555
+ldeor x11, x12, [x5] :: rs 5555555555555555 rt 5555555555555555 rn mem 0000000000000000
+
+ldeor x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem 0000000000000000
+ldeor x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt aaaaaaaaaaaaaaaa rn mem aaaaaaaaaaaaaaaa
+
+ldeor x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt 0000000000000000 rn mem aaaaaaaaaaaaaaaa
+ldeor x11, x12, [x5] :: rs aaaaaaaaaaaaaaaa rt aaaaaaaaaaaaaaaa rn mem 0000000000000000
+
+ldeor x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 0000000000000000
+ldeor x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 3141592653589793
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 3141592653589793 rn mem 3141592653589793
+
+ldeor x11, x12, [x5] :: rs 3141592653589793 rt 0000000000000000 rn mem 3141592653589793
+ldeor x11, x12, [x5] :: rs 3141592653589793 rt 3141592653589793 rn mem 0000000000000000
+
+ldeor x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 0000000000000000
+ldeor x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 0000000000000000 rn mem 2718281828459045
+ldeor x11, x12, [x5] :: rs 0000000000000000 rt 2718281828459045 rn mem 2718281828459045
+
+ldeor x11, x12, [x5] :: rs 2718281828459045 rt 0000000000000000 rn mem 2718281828459045
+ldeor x11, x12, [x5] :: rs 2718281828459045 rt 2718281828459045 rn mem 0000000000000000
+
--- /dev/null
+prog: atomics_v81
+prereq: test -x atomics_v81
+vgopts: -q
projects / thirdparty / valgrind.git / commitdiff
