arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI controller

Enable the USB3.0 (CH0) host controllers on the RZ/V2N Evaluation Kit.
The CN4 connector on the EVK provides access to the USB3.0 channel.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251119110505.100253-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
index 4445bebd96c97b6c1af8a91132280bfd2e68f128..89154875bb33df8bf1767b604473f0d58c68389a 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
@@ -411,6 +411,11 @@
                };
        };
 
+       usb3_pins: usb3 {
+               pinmux = <RZV2N_PORT_PINMUX(B, 0, 14)>, /* USB30_VBUSEN */
+                        <RZV2N_PORT_PINMUX(B, 1, 14)>; /* USB30_OVRCURN */
+       };
+
        xspi_pins: xspi0 {
                ctrl {
                        pins = "XSPI0_RESET0N", "XSPI0_CS0N", "XSPI0_CKP";
@@ -461,10 +466,20 @@
        status = "okay";
 };
 
+&usb3_phy {
+       status = "okay";
+};
+
 &wdt1 {
        status = "okay";
 };
 
+&xhci {
+       pinctrl-0 = <&usb3_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
 &xspi {
        pinctrl-0 = <&xspi_pins>;
        pinctrl-names = "default";