]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: sm8650: add missing cpu-cfg interconnect path in the mdss node
authorNeil Armstrong <neil.armstrong@linaro.org>
Thu, 27 Feb 2025 09:00:33 +0000 (10:00 +0100)
committerBjorn Andersson <andersson@kernel.org>
Tue, 4 Mar 2025 03:27:12 +0000 (21:27 -0600)
The bindings requires the mdp0-mem and the cpu-cfg interconnect path,
add the missing cpu-cfg path to fix the dtbs check error and also to ensure
that MDSS has enough bandwidth to let HLOS write config registers.

Fixes: 9fa33cbca3d2 ("arm64: dts: qcom: sm8650: correct MDSS interconnects")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250227-topic-sm8x50-mdss-interconnect-bindings-fix-v5-2-bf6233c6ebe5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm8650.dtsi

index de960bcaf3ccf6e2be47bf63a02effbfb75241bf..719ad437756a499cee4170abccc83f2047f0f747 100644 (file)
                        resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
 
                        interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS
-                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
-                       interconnect-names = "mdp0-mem";
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
+                       interconnect-names = "mdp0-mem",
+                                            "cpu-cfg";
 
                        power-domains = <&dispcc MDSS_GDSC>;