arm: [MVE intrinsics] factorize vmlaq_n vmlasq_n vqdmlahq_n vqdmlashq_n vqrdmlahq_n...

Factorize vmlaq_n, vmlasq_n, vqdmlahq_n, vqdmlashq_n, vqrdmlahq_n,
vqrdmlashq_n builtins so that they use the same parameterized names.

2022-12-12  Christophe Lyon  <christophe.lyon@arm.com>

	gcc/
	* config/arm/iterators.md (MVE_VMLxQ_N): New.
	(mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
	vqrdmlash.
	(supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
	VQRDMLASHQ_N_S.
	* config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
	(mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
	(mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
	(mve_vqrdmlashq_n_<supf><mode>): Merge into ...
	(@mve_<mve_insn>q_n_<supf><mode>): ... this.

diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index c23ca7361c1b93d2b24511b2c2277a499171505d..abd904da11e362ba9daa26ed1c238814d38716b2 100644 (file)
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -699,6 +699,15 @@
                     VMINAQ_M_S
                     ])
 
+(define_int_iterator MVE_VMLxQ_N [
+                    VMLAQ_N_S VMLAQ_N_U
+                    VMLASQ_N_S VMLASQ_N_U
+                    VQDMLAHQ_N_S
+                    VQDMLASHQ_N_S
+                    VQRDMLAHQ_N_S
+                    VQRDMLASHQ_N_S
+                    ])
+
 (define_int_iterator MVE_VMLxDAVQ [
                     VMLADAVQ_S VMLADAVQ_U
                     VMLADAVXQ_S
@@ -917,7 +926,9 @@
                 (VMLALDAVXQ_P_S "vmlaldavx")
                 (VMLALDAVXQ_S "vmlaldavx")
                 (VMLAQ_M_N_S "vmla") (VMLAQ_M_N_U "vmla")
+                (VMLAQ_N_S "vmla") (VMLAQ_N_U "vmla")
                 (VMLASQ_M_N_S "vmlas") (VMLASQ_M_N_U "vmlas")
+                (VMLASQ_N_S "vmlas") (VMLASQ_N_U "vmlas")
                 (VMLSDAVAQ_P_S "vmlsdava")
                 (VMLSDAVAQ_S "vmlsdava")
                 (VMLSDAVAXQ_P_S "vmlsdavax")
@@ -963,7 +974,9 @@
                 (VQDMLADHXQ_M_S "vqdmladhx")
                 (VQDMLADHXQ_S "vqdmladhx")
                 (VQDMLAHQ_M_N_S "vqdmlah")
+                (VQDMLAHQ_N_S "vqdmlah")
                 (VQDMLASHQ_M_N_S "vqdmlash")
+                (VQDMLASHQ_N_S "vqdmlash")
                 (VQDMLSDHQ_M_S "vqdmlsdh")
                 (VQDMLSDHQ_S "vqdmlsdh")
                 (VQDMLSDHXQ_M_S "vqdmlsdhx")
@@ -987,7 +1000,9 @@
                 (VQRDMLADHXQ_M_S "vqrdmladhx")
                 (VQRDMLADHXQ_S "vqrdmladhx")
                 (VQRDMLAHQ_M_N_S "vqrdmlah")
+                (VQRDMLAHQ_N_S "vqrdmlah")
                 (VQRDMLASHQ_M_N_S "vqrdmlash")
+                (VQRDMLASHQ_N_S "vqrdmlash")
                 (VQRDMLSDHQ_M_S "vqrdmlsdh")
                 (VQRDMLSDHQ_S "vqrdmlsdh")
                 (VQRDMLSDHXQ_M_S "vqrdmlsdhx")
@@ -2406,6 +2421,10 @@
                       (VQRDMLADHXQ_S "s")
                       (VQRDMLSDHQ_S "s")
                       (VQRDMLSDHXQ_S "s")
+                      (VQDMLAHQ_N_S "s")
+                      (VQDMLASHQ_N_S "s")
+                      (VQRDMLAHQ_N_S "s")
+                      (VQRDMLASHQ_N_S "s")
                       ])
 
 ;; Both kinds of return insn.

diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index bf4d18455fe348d803f9bda1401b30e7e22eb69e..14634cbf3339015d29eb39cef9d411ea28fe974a 100644 (file)
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -1955,34 +1955,23 @@
    (set_attr "length""8")])
 
 ;;
-;; [vmlaq_n_u, vmlaq_n_s])
+;; [vmlaq_n_u, vmlaq_n_s]
+;; [vmlasq_n_u, vmlasq_n_s]
+;; [vqdmlahq_n_s]
+;; [vqdmlashq_n_s]
+;; [vqrdmlahq_n_s]
+;; [vqrdmlashq_n_s]
 ;;
-(define_insn "mve_vmlaq_n_<supf><mode>"
-  [
-   (set (match_operand:MVE_2 0 "s_register_operand" "=w")
-       (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
-                      (match_operand:MVE_2 2 "s_register_operand" "w")
-                      (match_operand:<V_elem> 3 "s_register_operand" "r")]
-        VMLAQ_N))
-  ]
-  "TARGET_HAVE_MVE"
-  "vmla.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
-  [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vmlasq_n_u, vmlasq_n_s])
-;;
-(define_insn "mve_vmlasq_n_<supf><mode>"
+(define_insn "@mve_<mve_insn>q_n_<supf><mode>"
   [
    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
        (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
                       (match_operand:MVE_2 2 "s_register_operand" "w")
                       (match_operand:<V_elem> 3 "s_register_operand" "r")]
-        VMLASQ_N))
+        MVE_VMLxQ_N))
   ]
   "TARGET_HAVE_MVE"
-  "vmlas.<supf>%#<V_sz_elem>   %q0, %q2, %3"
+  "<mve_insn>.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
   [(set_attr "type" "mve_move")
 ])
 
@@ -2018,38 +2007,6 @@
   [(set_attr "type" "mve_move")
 ])
 
-;;
-;; [vqdmlahq_n_s])
-;;
-(define_insn "mve_vqdmlahq_n_<supf><mode>"
-  [
-   (set (match_operand:MVE_2 0 "s_register_operand" "=w")
-       (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
-                      (match_operand:MVE_2 2 "s_register_operand" "w")
-                      (match_operand:<V_elem> 3 "s_register_operand" "r")]
-        VQDMLAHQ_N))
-  ]
-  "TARGET_HAVE_MVE"
-  "vqdmlah.s%#<V_sz_elem>\t%q0, %q2, %3"
-  [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vqdmlashq_n_s])
-;;
-(define_insn "mve_vqdmlashq_n_<supf><mode>"
-  [
-   (set (match_operand:MVE_2 0 "s_register_operand" "=w")
-       (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
-                      (match_operand:MVE_2 2 "s_register_operand" "w")
-                      (match_operand:<V_elem> 3 "s_register_operand" "r")]
-        VQDMLASHQ_N))
-  ]
-  "TARGET_HAVE_MVE"
-  "vqdmlash.s%#<V_sz_elem>\t%q0, %q2, %3"
-  [(set_attr "type" "mve_move")
-])
-
 ;;
 ;; [vqdmladhq_s]
 ;; [vqdmladhxq_s]
@@ -2073,38 +2030,6 @@
   [(set_attr "type" "mve_move")
 ])
 
-;;
-;; [vqrdmlahq_n_s])
-;;
-(define_insn "mve_vqrdmlahq_n_<supf><mode>"
-  [
-   (set (match_operand:MVE_2 0 "s_register_operand" "=w")
-       (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
-                      (match_operand:MVE_2 2 "s_register_operand" "w")
-                      (match_operand:<V_elem> 3 "s_register_operand" "r")]
-        VQRDMLAHQ_N))
-  ]
-  "TARGET_HAVE_MVE"
-  "vqrdmlah.s%#<V_sz_elem>\t%q0, %q2, %3"
-  [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vqrdmlashq_n_s])
-;;
-(define_insn "mve_vqrdmlashq_n_<supf><mode>"
-  [
-   (set (match_operand:MVE_2 0 "s_register_operand" "=w")
-       (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
-                      (match_operand:MVE_2 2 "s_register_operand" "w")
-                      (match_operand:<V_elem> 3 "s_register_operand" "r")]
-        VQRDMLASHQ_N))
-  ]
-  "TARGET_HAVE_MVE"
-  "vqrdmlash.s%#<V_sz_elem>\t%q0, %q2, %3"
-  [(set_attr "type" "mve_move")
-])
-
 ;;
 ;; [vqrshlq_m_n_s, vqrshlq_m_n_u]
 ;; [vrshlq_m_n_s, vrshlq_m_n_u]