drm/xe/guc_ads: allocate UM queues in VRAM on dGFX

On iGPU, the UM queue BO is allocated in system memory. On dGFX, the BO
was previously created in system memory and later reallocated in
xe_guc_realloc_post_hwconfig().  Allocate the UM queue BO directly in
VRAM on dGFX, where it is ultimately required.

Fixes: 9c57bc08652a ("drm/xe/lnl: Drop force_probe requirement")
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: <stable@vger.kernel.org> # v6.12+
Signed-off-by: Jia Yao <jia.yao@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patch.msgid.link/20260804165057.129529-3-jia.yao@intel.com
(cherry picked from commit ace076ef0a854ab5940bacc539bf66afd61d118c)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 21cf3edef9223e1cec89fde0511ade7e53b84461..4023700ff2a9678f6168d776b49c892adc8a58e5 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -714,12 +714,6 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)
        if (ret)
                return ret;
 
-       if (guc->ads.um_queue_bo) {
-               ret = xe_managed_bo_reinit_in_vram(xe, tile, &guc->ads.um_queue_bo);
-               if (ret)
-                       return ret;
-       }
-
        return 0;
 }
 

diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index a411d6440ba619d39a31f9dff8fe1bf08990370c..b6d07f2e73bfcce56850808cf8e70c587f806bfb 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -393,15 +393,17 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)
                /*
                 * Allocate a separate BO for the HW fault ring (UM queues).
                 *
-                * Round the size up to the next power of two so that
+                * Round the size up to the next power of two so that on iGPU
                 * (system memory, no IOMMU) the TTM pool issues a single
                 * alloc_pages(order=N) call, maximising the chance of getting
                 * a physically contiguous block.  GuC requires contiguous DPA.
                 */
-               size_t um_size = roundup_pow_of_two(GUC_UM_QUEUE_SIZE *
+               size_t um_size = IS_DGFX(xe) ?
+                                GUC_UM_QUEUE_SIZE * GUC_UM_HW_QUEUE_MAX :
+                                roundup_pow_of_two(GUC_UM_QUEUE_SIZE *
                                                    GUC_UM_HW_QUEUE_MAX);
 
-               u32 um_flags = XE_BO_FLAG_SYSTEM |
+               u32 um_flags = XE_BO_FLAG_VRAM_IF_DGFX(tile) |
                               XE_BO_FLAG_GGTT |
                               XE_BO_FLAG_GGTT_INVALIDATE |
                               XE_BO_FLAG_PINNED_NORESTORE;