arm64: dts: qcom: msm8998: Use the header with DSI phy clock IDs

Use the header with DSI phy clock IDs to make code more readable.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-9-73b482a6dd02@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index c2caad85c668df2ebe900bc560e39480ae03e353..7eca38440cd7ea60caa3e8467097aaf0d7928df5 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -2,6 +2,7 @@
 /* Copyright (c) 2016, The Linux Foundation. All rights reserved. */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
@@ -2790,10 +2791,10 @@
                                      "gpll0_div";
                        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
                                 <&gcc GCC_MMSS_GPLL0_CLK>,
-                                <&mdss_dsi0_phy 1>,
-                                <&mdss_dsi0_phy 0>,
-                                <&mdss_dsi1_phy 1>,
-                                <&mdss_dsi1_phy 0>,
+                                <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
                                 <&mdss_hdmi_phy 0>,
                                 <0>,
                                 <0>,
@@ -2932,8 +2933,8 @@
                                              "bus";
                                assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
                                                  <&mmcc PCLK0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi0_phy 0>,
-                                                        <&mdss_dsi0_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
 
                                operating-points-v2 = <&dsi_opp_table>;
                                power-domains = <&rpmpd MSM8998_VDDCX>;
@@ -3008,8 +3009,8 @@
                                              "bus";
                                assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
                                                  <&mmcc PCLK1_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi1_phy 0>,
-                                                        <&mdss_dsi1_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
 
                                operating-points-v2 = <&dsi_opp_table>;
                                power-domains = <&rpmpd MSM8998_VDDCX>;