arm64: dts: renesas: r9a09g056: Add USB2.0 support

The Renesas RZ/V2N (R9A09G056) SoC features a single-channel USB2.0
interface with host and peripheral (function) support.

Add the ECHI, OHCI, USB2.0 PHY and reset control nodes for USB2.0
channel in R9A09G056 SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250528140453.181851-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
index 9adf216b6d0eac6749592e2204f43eec79d4fa4b..d17d6a9ed0d2ba0d8f7eb184f8b1622e7d332204 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
@@ -569,6 +569,72 @@
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
                };
 
+               ohci0: usb@15800000 {
+                       compatible = "generic-ohci";
+                       reg = <0 0x15800000 0 0x100>;
+                       interrupts = <GIC_SPI 742 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 0xb3>, <&cpg CPG_MOD 0xb6>;
+                       resets = <&usb20phyrst>, <&cpg 0xac>;
+                       phys = <&usb2_phy0 1>;
+                       phy-names = "usb";
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ehci0: usb@15800100 {
+                       compatible = "generic-ehci";
+                       reg = <0 0x15800100 0 0x100>;
+                       interrupts = <GIC_SPI 743 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 0xb3>, <&cpg CPG_MOD 0xb6>;
+                       resets = <&usb20phyrst>, <&cpg 0xac>;
+                       phys = <&usb2_phy0 2>;
+                       phy-names = "usb";
+                       companion = <&ohci0>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               usb2_phy0: usb-phy@15800200 {
+                       compatible = "renesas,usb2-phy-r9a09g056", "renesas,usb2-phy-r9a09g057";
+                       reg = <0 0x15800200 0 0x700>;
+                       interrupts = <GIC_SPI 745 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 0xb3>,
+                                <&cpg CPG_CORE R9A09G056_USB2_0_CLK_CORE0>;
+                       clock-names = "fck", "usb_x1";
+                       resets = <&usb20phyrst>;
+                       #phy-cells = <1>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               hsusb: usb@15820000 {
+                       compatible = "renesas,usbhs-r9a09g056",
+                                    "renesas,rzg2l-usbhs";
+                       reg = <0 0x15820000 0 0x10000>;
+                       interrupts = <GIC_SPI 751 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 754 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 0xb3>, <&cpg CPG_MOD 0xb5>;
+                       resets = <&usb20phyrst>,
+                                <&cpg 0xae>;
+                       phys = <&usb2_phy0 3>;
+                       phy-names = "usb";
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               usb20phyrst: usb20phy-reset@15830000 {
+                       compatible = "renesas,r9a09g056-usb2phy-reset",
+                                    "renesas,r9a09g057-usb2phy-reset";
+                       reg = <0 0x15830000 0 0x10000>;
+                       clocks = <&cpg CPG_MOD 0xb6>;
+                       resets = <&cpg 0xaf>;
+                       power-domains = <&cpg>;
+                       #reset-cells = <0>;
+                       status = "disabled";
+               };
+
                sdhi0: mmc@15c00000  {
                        compatible = "renesas,sdhi-r9a09g056", "renesas,sdhi-r9a09g057";
                        reg = <0x0 0x15c00000 0 0x10000>;