RISC-V: Add vandn combine helper.

This patch adds a combine pattern for vandn as well as tests for it.

gcc/ChangeLog:

	* config/riscv/autovec-opt.md (*vandn_<mode>): New pattern.
	* config/riscv/vector.md: Add vandn to mode_idx.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/vandn-1.c: New test.
	* gcc.target/riscv/rvv/autovec/binop/vandn-run.c: New test.
	* gcc.target/riscv/rvv/autovec/binop/vandn-template.h: New test.

diff --git a/gcc/config/riscv/autovec-opt.md b/gcc/config/riscv/autovec-opt.md
index bc6af042bcf91fcae6351ddab97bdc2629e3b251..6a2eabbd854455a2377f300e6d3391e64ce40f65 100644 (file)
--- a/gcc/config/riscv/autovec-opt.md
+++ b/gcc/config/riscv/autovec-opt.md
@@ -1591,3 +1591,21 @@
     DONE;
   }
   [(set_attr "type" "vwsll")])
+
+;; vnot + vand = vandn.
+(define_insn_and_split "*vandn_<mode>"
+ [(set (match_operand:V_VLSI 0 "register_operand" "=vr")
+   (and:V_VLSI
+    (not:V_VLSI
+      (match_operand:V_VLSI  2 "register_operand"  "vr"))
+    (match_operand:V_VLSI    1 "register_operand"  "vr")))]
+  "TARGET_ZVBB && can_create_pseudo_p ()"
+  "#"
+  "&& 1"
+  [(const_int 0)]
+  {
+    insn_code icode = code_for_pred_vandn (<MODE>mode);
+    riscv_vector::emit_vlmax_insn (icode, riscv_vector::BINARY_OP, operands);
+    DONE;
+  }
+  [(set_attr "type" "vandn")])

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 69423be6917e793ab02de9b69b7a19b2747550a9..c15af17ec62c58bd668718695e8069364543e8dd 100644 (file)
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -743,7 +743,7 @@
                                vfcmp,vfminmax,vfsgnj,vfclass,vfmerge,vfmov,\
                                vfcvtitof,vfncvtitof,vfncvtftoi,vfncvtftof,vmalu,vmiota,vmidx,\
                                vimovxv,vfmovfv,vslideup,vslidedown,vislide1up,vislide1down,vfslide1up,vfslide1down,\
-                               vgather,vcompress,vmov,vnclip,vnshift")
+                               vgather,vcompress,vmov,vnclip,vnshift,vandn")
               (const_int 0)
 
               (eq_attr "type" "vimovvx,vfmovvf")

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-1.c
new file mode 100644 (file)
index 0000000..3bb5bf8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-1.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-add-options "riscv_v" } */
+/* { dg-add-options "riscv_zvbb" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "vandn-template.h"
+
+/* { dg-final { scan-assembler-times {\tvandn\.vv} 8 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-run.c
new file mode 100644 (file)
index 0000000..243c597
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-run.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-require-effective-target "riscv_zvbb_ok" } */
+/* { dg-add-options "riscv_v" } */
+/* { dg-add-options "riscv_zvbb" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model" } */
+
+#include "vandn-template.h"
+
+#include <assert.h>
+
+#define SZ 512
+
+#define RUN(TYPE, VAL)                                                         \
+  TYPE a##TYPE[SZ];                                                            \
+  TYPE b##TYPE[SZ];                                                            \
+  for (int i = 0; i < SZ; i++)                                                 \
+    {                                                                          \
+      a##TYPE[i] = 123;                                                        \
+      b##TYPE[i] = VAL;                                                        \
+    }                                                                          \
+  vandn_##TYPE (a##TYPE, a##TYPE, b##TYPE, SZ);                                \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (a##TYPE[i] == (TYPE) (123 & ~VAL));
+
+#define RUN2(TYPE, VAL)                                                        \
+  TYPE as##TYPE[SZ];                                                           \
+  for (int i = 0; i < SZ; i++)                                                 \
+    as##TYPE[i] = 123;                                                         \
+  vandns_##TYPE (as##TYPE, as##TYPE, VAL, SZ);                                 \
+  for (int i = 0; i < SZ; i++)                                                 \
+    assert (as##TYPE[i] == (123 & ~VAL));
+
+#define RUN_ALL()                                                              \
+  RUN (int8_t, -1)                                                             \
+  RUN (uint8_t, 2)                                                             \
+  RUN (int16_t, -1)                                                            \
+  RUN (uint16_t, 2)                                                            \
+  RUN (int32_t, -3)                                                            \
+  RUN (uint32_t, 4)                                                            \
+  RUN (int64_t, -5)                                                            \
+  RUN (uint64_t, 6)                                                            \
+  RUN2 (int8_t, -7)                                                            \
+  RUN2 (uint8_t, 8)                                                            \
+  RUN2 (int16_t, -7)                                                           \
+  RUN2 (uint16_t, 8)                                                           \
+  RUN2 (int32_t, -9)                                                           \
+  RUN2 (uint32_t, 10)                                                          \
+  RUN2 (int64_t, -11)                                                          \
+  RUN2 (uint64_t, 12)
+
+int main ()
+{
+  RUN_ALL()
+}

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-template.h
new file mode 100644 (file)
index 0000000..47ee86a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vandn-template.h
@@ -0,0 +1,38 @@
+#include <stdint-gcc.h>
+
+#define TEST_TYPE(TYPE)                                                        \
+  __attribute__ ((noipa)) void vandn_##TYPE (TYPE *restrict dst,               \
+                                            TYPE *restrict a,                 \
+                                            TYPE *restrict b, int n)          \
+  {                                                                            \
+    for (int i = 0; i < n; i++)                                                \
+      dst[i] = a[i] & ~b[i];                                                   \
+  }
+
+#define TEST2_TYPE(TYPE)                                                       \
+  __attribute__ ((noipa)) void vandns_##TYPE (TYPE *restrict dst,              \
+                                             TYPE *restrict a, TYPE b, int n) \
+  {                                                                            \
+    for (int i = 0; i < n; i++)                                                \
+      dst[i] = a[i] & ~b;                                                      \
+  }
+
+#define TEST_ALL()                                                             \
+ TEST_TYPE (int8_t)                                                           \
+ TEST_TYPE(uint8_t)    \
+ TEST_TYPE(int16_t)    \
+ TEST_TYPE(uint16_t)   \
+ TEST_TYPE(int32_t)    \
+ TEST_TYPE(uint32_t)   \
+ TEST_TYPE(int64_t)    \
+ TEST_TYPE(uint64_t)    \
+ TEST2_TYPE(int8_t)    \
+ TEST2_TYPE(uint8_t)   \
+ TEST2_TYPE(int16_t)   \
+ TEST2_TYPE(uint16_t)  \
+ TEST2_TYPE(int32_t)   \
+ TEST2_TYPE(uint32_t)  \
+ TEST2_TYPE(int64_t)   \
+ TEST2_TYPE(uint64_t)
+
+TEST_ALL()