Refine maskloadmn pattern with UNSPEC_MASKLOAD.

If mem_addr points to a memory region with less than whole vector size
bytes of accessible memory and k is a mask that would prevent reading
the inaccessible bytes from mem_addr, add UNSPEC_MASKLOAD to prevent
it to be transformed to vpblendd.

gcc/ChangeLog:

	PR target/110309
	* config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
	Refine pattern with UNSPEC_MASKLOAD.
	(maskload<mode><avx512fmaskmodelower>): Ditto.

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 95619944c87783c8841fbfdeef99503c142f68be..a7e5f6dad4d9b1bf1e47fcbb0572976148d6ef68 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -21857,7 +21857,9 @@
 (define_expand "maskload<mode><avx512fmaskmodelower>"
   [(set (match_operand:V48_AVX512VL 0 "register_operand")
        (vec_merge:V48_AVX512VL
-         (match_operand:V48_AVX512VL 1 "memory_operand")
+         (unspec:V48_AVX512VL
+           [(match_operand:V48_AVX512VL 1 "memory_operand")]
+           UNSPEC_MASKLOAD)
          (match_dup 0)
          (match_operand:<avx512fmaskmode> 2 "register_operand")))]
   "TARGET_AVX512F")
@@ -21865,7 +21867,9 @@
 (define_expand "maskload<mode><avx512fmaskmodelower>"
   [(set (match_operand:VI12_AVX512VL 0 "register_operand")
        (vec_merge:VI12_AVX512VL
-         (match_operand:VI12_AVX512VL 1 "memory_operand")
+         (unspec:VI12_AVX512VL
+           [(match_operand:VI12_AVX512VL 1 "memory_operand")]
+           UNSPEC_MASKLOAD)
          (match_dup 0)
          (match_operand:<avx512fmaskmode> 2 "register_operand")))]
   "TARGET_AVX512BW")