switch (spcr->base_addr.space_id)
{
case GRUB_ACPI_GENADDR_MEM_SPACE:
- return grub_serial_ns8250_add_mmio (spcr->base_addr.addr, &config);
+ return grub_serial_ns8250_add_mmio (spcr->base_addr.addr,
+ spcr->base_addr.access_size, &config);
case GRUB_ACPI_GENADDR_IO_SPACE:
return grub_serial_ns8250_add_port (spcr->base_addr.addr, &config);
default:
{
asm volatile("" : : : "memory");
if (port->mmio == true)
- return *((volatile grub_uint8_t *) (port->mmio_base + reg));
+ {
+ /*
+ * Note: we assume MMIO UARTs are little endian. This is not true of all
+ * embedded platforms but will do for now.
+ */
+ switch(port->access_size)
+ {
+ default:
+ /* ACPI tables occasionally uses "0" (legacy) as equivalent to "1" (byte). */
+ case 1:
+ return *((volatile grub_uint8_t *) (port->mmio_base + reg));
+ case 2:
+ return grub_le_to_cpu16 (*((volatile grub_uint16_t *) (port->mmio_base + (reg << 1))));
+ case 3:
+ return grub_le_to_cpu32 (*((volatile grub_uint32_t *) (port->mmio_base + (reg << 2))));
+ case 4:
+ /*
+ * This will only work properly on 64-bit systems since 64-bit
+ * accessors aren't atomic on 32-bit hardware. Thankfully the
+ * case of a UART with a 64-bit register spacing on 32-bit
+ * also probably doesn't exist.
+ */
+ return grub_le_to_cpu64 (*((volatile grub_uint64_t *) (port->mmio_base + (reg << 3))));
+ }
+ }
return grub_inb (port->port + reg);
}
{
asm volatile("" : : : "memory");
if (port->mmio == true)
- *((volatile grub_uint8_t *) (port->mmio_base + reg)) = value;
+ {
+ switch(port->access_size)
+ {
+ default:
+ /* ACPI tables occasionally uses "0" (legacy) as equivalent to "1" (byte). */
+ case 1:
+ *((volatile grub_uint8_t *) (port->mmio_base + reg)) = value;
+ break;
+ case 2:
+ *((volatile grub_uint16_t *) (port->mmio_base + (reg << 1))) = grub_cpu_to_le16 (value);
+ break;
+ case 3:
+ *((volatile grub_uint32_t *) (port->mmio_base + (reg << 2))) = grub_cpu_to_le32 (value);
+ break;
+ case 4:
+ /* See commment in ns8250_reg_read(). */
+ *((volatile grub_uint64_t *) (port->mmio_base + (reg << 3))) = grub_cpu_to_le64 (value);
+ break;
+ }
+ }
else
grub_outb (value, port->port + reg);
}
grub_print_error ();
grub_serial_register (&com_ports[i]);
+ com_ports[i].access_size = 1;
}
}
p->driver = &grub_ns8250_driver;
p->mmio = false;
p->port = port;
+ p->access_size = 1;
if (config != NULL)
grub_serial_port_configure (p, config);
else
}
char *
-grub_serial_ns8250_add_mmio (grub_addr_t addr, struct grub_serial_config *config)
+grub_serial_ns8250_add_mmio (grub_addr_t addr, unsigned int acc_size,
+ struct grub_serial_config *config)
{
struct grub_serial_port *p;
unsigned i;
p->driver = &grub_ns8250_driver;
p->mmio = true;
p->mmio_base = addr;
+ p->access_size = acc_size;
if (config != NULL)
grub_serial_port_configure (p, config);
else
#if defined(__mips__) || defined (__i386__) || defined (__x86_64__)
grub_port_t port;
#endif
- grub_addr_t mmio_base;
+ struct
+ {
+ grub_addr_t mmio_base;
+ /* Access size uses ACPI definition. */
+ grub_uint8_t access_size;
+ };
};
};
struct
void grub_ns8250_init (void);
char *grub_ns8250_spcr_init (void);
char *grub_serial_ns8250_add_port (grub_port_t port, struct grub_serial_config *config);
-char *grub_serial_ns8250_add_mmio (grub_addr_t addr, struct grub_serial_config *config);
+char *grub_serial_ns8250_add_mmio (grub_addr_t addr, unsigned int acc_size,
+ struct grub_serial_config *config);
#endif
#ifdef GRUB_MACHINE_IEEE1275
void grub_ofserial_init (void);