]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/amd/display: Skip checking FRL_MODE bit for PCON BW determination
authorGeorge Shen <george.shen@amd.com>
Sat, 15 Feb 2025 03:00:13 +0000 (22:00 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 29 May 2025 09:12:56 +0000 (11:12 +0200)
[ Upstream commit 0584bbcf0c53c133081100e4f4c9fe41e598d045 ]

[Why/How]
Certain PCON will clear the FRL_MODE bit despite supporting the link BW
indicated in the other bits.

Thus, skip checking the FRL_MODE bit when interpreting the
hdmi_encoded_link_bw struct.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

index 44f33e3bc1c599d09110066caf1e092c3538c661..6d7131369f00bb74b2956a3bd02f1c555d07fd86 100644 (file)
@@ -250,21 +250,21 @@ static uint32_t intersect_frl_link_bw_support(
 {
        uint32_t supported_bw_in_kbps = max_supported_frl_bw_in_kbps;
 
-       // HDMI_ENCODED_LINK_BW bits are only valid if HDMI Link Configuration bit is 1 (FRL mode)
-       if (hdmi_encoded_link_bw.bits.FRL_MODE) {
-               if (hdmi_encoded_link_bw.bits.BW_48Gbps)
-                       supported_bw_in_kbps = 48000000;
-               else if (hdmi_encoded_link_bw.bits.BW_40Gbps)
-                       supported_bw_in_kbps = 40000000;
-               else if (hdmi_encoded_link_bw.bits.BW_32Gbps)
-                       supported_bw_in_kbps = 32000000;
-               else if (hdmi_encoded_link_bw.bits.BW_24Gbps)
-                       supported_bw_in_kbps = 24000000;
-               else if (hdmi_encoded_link_bw.bits.BW_18Gbps)
-                       supported_bw_in_kbps = 18000000;
-               else if (hdmi_encoded_link_bw.bits.BW_9Gbps)
-                       supported_bw_in_kbps = 9000000;
-       }
+       /* Skip checking FRL_MODE bit, as certain PCON will clear
+        * it despite supporting the link BW indicated in the other bits.
+        */
+       if (hdmi_encoded_link_bw.bits.BW_48Gbps)
+               supported_bw_in_kbps = 48000000;
+       else if (hdmi_encoded_link_bw.bits.BW_40Gbps)
+               supported_bw_in_kbps = 40000000;
+       else if (hdmi_encoded_link_bw.bits.BW_32Gbps)
+               supported_bw_in_kbps = 32000000;
+       else if (hdmi_encoded_link_bw.bits.BW_24Gbps)
+               supported_bw_in_kbps = 24000000;
+       else if (hdmi_encoded_link_bw.bits.BW_18Gbps)
+               supported_bw_in_kbps = 18000000;
+       else if (hdmi_encoded_link_bw.bits.BW_9Gbps)
+               supported_bw_in_kbps = 9000000;
 
        return supported_bw_in_kbps;
 }