sse.md (VI4_AVX512F): New.

        * config/i386/sse.md (VI4_AVX512F): New.
        (VI8_AVX2_AVX512F): Ditto.
        (mul<mode>3): Extended with wider modes.
        (*<sse4_1_avx2>_mul<mode>3): Ditto.
        (mul<mode>3): Ditto.
        (vec_widen_<s>mult_odd_<mode>): Ditto.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>
From-SVN: r203434

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 93da34dcabeb9b374b4f1b126814d0b8cd8dc489..22ffaa51a6fe6f091130730c6c7e7fe86f6e77f5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,20 @@
+2013-10-11  Alexander Ivchenko  <alexander.ivchenko@intel.com>
+           Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
+           Sergey Lega  <sergey.s.lega@intel.com>
+           Anna Tikhonova  <anna.tikhonova@intel.com>
+           Ilya Tocar  <ilya.tocar@intel.com>
+           Andrey Turetskiy  <andrey.turetskiy@intel.com>
+           Ilya Verbin  <ilya.verbin@intel.com>
+           Kirill Yukhin  <kirill.yukhin@intel.com>
+           Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
+
+       * config/i386/sse.md (VI4_AVX512F): New.
+       (VI8_AVX2_AVX512F): Ditto.
+       (mul<mode>3): Extended with wider modes.
+       (*<sse4_1_avx2>_mul<mode>3): Ditto.
+       (mul<mode>3): Ditto.
+       (vec_widen_<s>mult_odd_<mode>): Ditto.
+
 2013-10-11  Alexander Ivchenko  <alexander.ivchenko@intel.com>
            Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
            Sergey Lega  <sergey.s.lega@intel.com>

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 351f5bb59564ae13e80cc925910b360845763b57..127ecf262397657a85f65103442f5d7e4c33a57d 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -207,9 +207,15 @@
 (define_mode_iterator VI4_AVX2
   [(V8SI "TARGET_AVX2") V4SI])
 
+(define_mode_iterator VI4_AVX512F
+  [(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI])
+
 (define_mode_iterator VI8_AVX2
   [(V4DI "TARGET_AVX2") V2DI])
 
+(define_mode_iterator VI8_AVX2_AVX512F
+  [(V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX2") V2DI])
+
 ;; ??? We should probably use TImode instead.
 (define_mode_iterator VIMAX_AVX2
   [(V2TI "TARGET_AVX2") V1TI])
@@ -5854,10 +5860,10 @@
    (set_attr "mode" "TI")])
 
 (define_expand "mul<mode>3"
-  [(set (match_operand:VI4_AVX2 0 "register_operand")
-       (mult:VI4_AVX2
-         (match_operand:VI4_AVX2 1 "general_vector_operand")
-         (match_operand:VI4_AVX2 2 "general_vector_operand")))]
+  [(set (match_operand:VI4_AVX512F 0 "register_operand")
+       (mult:VI4_AVX512F
+         (match_operand:VI4_AVX512F 1 "general_vector_operand")
+         (match_operand:VI4_AVX512F 2 "general_vector_operand")))]
   "TARGET_SSE2"
 {
   if (TARGET_SSE4_1)
@@ -5876,10 +5882,10 @@
 })
 
 (define_insn "*<sse4_1_avx2>_mul<mode>3"
-  [(set (match_operand:VI4_AVX2 0 "register_operand" "=x,v")
-       (mult:VI4_AVX2
-         (match_operand:VI4_AVX2 1 "nonimmediate_operand" "%0,v")
-         (match_operand:VI4_AVX2 2 "nonimmediate_operand" "xm,vm")))]
+  [(set (match_operand:VI4_AVX512F 0 "register_operand" "=x,v")
+       (mult:VI4_AVX512F
+         (match_operand:VI4_AVX512F 1 "nonimmediate_operand" "%0,v")
+         (match_operand:VI4_AVX512F 2 "nonimmediate_operand" "xm,vm")))]
   "TARGET_SSE4_1 && ix86_binary_operator_ok (MULT, <MODE>mode, operands)"
   "@
    pmulld\t{%2, %0|%0, %2}
@@ -5892,9 +5898,10 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_expand "mul<mode>3"
-  [(set (match_operand:VI8_AVX2 0 "register_operand")
-       (mult:VI8_AVX2 (match_operand:VI8_AVX2 1 "register_operand")
-                      (match_operand:VI8_AVX2 2 "register_operand")))]
+  [(set (match_operand:VI8_AVX2_AVX512F 0 "register_operand")
+       (mult:VI8_AVX2_AVX512F
+         (match_operand:VI8_AVX2_AVX512F 1 "register_operand")
+         (match_operand:VI8_AVX2_AVX512F 2 "register_operand")))]
   "TARGET_SSE2"
 {
   ix86_expand_sse2_mulvxdi3 (operands[0], operands[1], operands[2]);
@@ -5941,8 +5948,8 @@
 (define_expand "vec_widen_<s>mult_odd_<mode>"
   [(match_operand:<sseunpackmode> 0 "register_operand")
    (any_extend:<sseunpackmode>
-     (match_operand:VI4_AVX2 1 "general_vector_operand"))
-   (match_operand:VI4_AVX2 2 "general_vector_operand")]
+     (match_operand:VI4_AVX512F 1 "general_vector_operand"))
+   (match_operand:VI4_AVX512F 2 "general_vector_operand")]
   "TARGET_SSE2"
 {
   ix86_expand_mul_widen_evenodd (operands[0], operands[1], operands[2],