RISC-V: Fix bug of AVL propagation PASS

A run FAIL suddenly shows up today to me:
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load_run-11.c execution test

that I didn't have before.

After investigation, I realize that there is a bug in AVL propagtion PASS.

gcc/ChangeLog:

	* config/riscv/riscv-avlprop.cc
	(pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
	non-real insn AVL propation.

diff --git a/gcc/config/riscv/riscv-avlprop.cc b/gcc/config/riscv/riscv-avlprop.cc
index c59eb7f6fa324b403589dc9db0706af9cf451d0a..bcd77a3047a01c4faf02425e70848ccf1992bb05 100644 (file)
--- a/gcc/config/riscv/riscv-avlprop.cc
+++ b/gcc/config/riscv/riscv-avlprop.cc
@@ -266,6 +266,13 @@ pass_avlprop::get_vlmax_ta_preferred_avl (insn_info *insn) const
              def_info *def2 = dl.prev_def (use_insn);
              if (!def1 || !def2 || def1 != def2)
                return NULL_RTX;
+             /* For vectorized codes, we always use SELECT_VL/MIN_EXPR to
+                calculate the loop len at the header of the loop.
+                We only allow AVL propagation for real instruction for now.
+                TODO: We may enhance it for intrinsic codes if it is necessary.
+             */
+             if (!def1->insn ()->is_real ())
+               return NULL_RTX;
 
              /* FIXME: We only all AVL propation within a block which should
                 be totally enough for vectorized codes.