but for consistency these will get removed in a future release, too.
Use ``Sun-UltraSparc-IIIi-plus`` and ``Sun-UltraSparc-IV-plus`` instead.
-Power8E and Power8NVL CPUs and corresponding Pnv chips (since 10.1)
-'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
-
-The Power8E and Power8NVL variants of Power8 are not really useful anymore
-in qemu, and are old and unmaintained now.
-
-The CPUs as well as corresponding Power8NVL and Power8E PnvChips will also
-be considered deprecated.
-
System emulator machines
------------------------
what to expect from a CPU called 'any', and in fact the CPU does not do anything
special that isn't already done by the default CPUs rv32/rv64.
+Power8E and Power8NVL CPUs (removed in 11.1)
+''''''''''''''''''''''''''''''''''''''''''''
+
+The Power8E and Power8NVL variants of Power8 are not really useful anymore
+in qemu, and are old and unmaintained.
+Hence, the CPUs as well as corresponding Power8NVL and Power8E PnvChips have
+been removed
+
System accelerators
-------------------
* Multi processor support for many Power processors generations:
- POWER7, POWER7+
- - POWER8, POWER8NVL
+ - POWER8
- POWER9
- Power10
- Power11
DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
DEFINE_SPAPR_CPU_CORE_TYPE("power7p_v2.1"),
DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
- DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
- DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.2"),
DEFINE_SPAPR_CPU_CORE_TYPE("power10_v2.0"),
"POWER7 v2.3")
POWERPC_DEF("power7p_v2.1", CPU_POWERPC_POWER7P_v21, POWER7,
"POWER7+ v2.1")
- POWERPC_DEPRECATED_CPU("power8e_v2.1", CPU_POWERPC_POWER8E_v21, POWER8,
- "POWER8E v2.1", "CPU is unmaintained.")
POWERPC_DEF("power8_v2.0", CPU_POWERPC_POWER8_v20, POWER8,
"POWER8 v2.0")
- POWERPC_DEPRECATED_CPU("power8nvl_v1.0", CPU_POWERPC_POWER8NVL_v10, POWER8,
- "POWER8NVL v1.0", "CPU is unmaintained.")
POWERPC_DEF("power9_v2.0", CPU_POWERPC_POWER9_DD20, POWER9,
"POWER9 v2.0")
POWERPC_DEF("power9_v2.2", CPU_POWERPC_POWER9_DD22, POWER9,
{ "power7", "power7_v2.3" },
{ "power7+", "power7p_v2.1" },
{ "power7+_v2.1", "power7p_v2.1" },
- { "power8e", "power8e_v2.1" },
{ "power8", "power8_v2.0" },
- { "power8nvl", "power8nvl_v1.0" },
{ "power9", "power9_v2.2" },
{ "power10", "power10_v2.0" },
{ "power11", "power11_v2.0" },
CPU_POWERPC_POWER7_v23 = 0x003F0203,
CPU_POWERPC_POWER7P_BASE = 0x004A0000,
CPU_POWERPC_POWER7P_v21 = 0x004A0201,
- CPU_POWERPC_POWER8E_BASE = 0x004B0000,
- CPU_POWERPC_POWER8E_v21 = 0x004B0201,
CPU_POWERPC_POWER8_BASE = 0x004D0000,
CPU_POWERPC_POWER8_v20 = 0x004D0200,
- CPU_POWERPC_POWER8NVL_BASE = 0x004C0000,
- CPU_POWERPC_POWER8NVL_v10 = 0x004C0100,
CPU_POWERPC_POWER9_BASE = 0x004E0000,
CPU_POWERPC_POWER9_DD1 = 0x004E1100,
CPU_POWERPC_POWER9_DD20 = 0x004E1200,
if (base == CPU_POWERPC_POWER8_BASE) {
return true;
}
- if (base == CPU_POWERPC_POWER8E_BASE) {
- return true;
- }
- if (base == CPU_POWERPC_POWER8NVL_BASE) {
- return true;
- }
}
if (base != pcc_base) {
return false;
#ifdef TARGET_PPC64
{
uint32_t base_pvr = CPU_POWERPC_POWER_SERVER_MASK & mfpvr();
- ret = (base_pvr == CPU_POWERPC_POWER8E_BASE) ||
- (base_pvr == CPU_POWERPC_POWER8NVL_BASE) ||
- (base_pvr == CPU_POWERPC_POWER8_BASE);
+ ret = (base_pvr == CPU_POWERPC_POWER8_BASE);
}
#endif /* TARGET_PPC64 */
return ret;