Modified-by: Michael Brown <mcb30@ipxe.org>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
/* Read capabilities */
exanic->caps = readl ( exanic->regs + EXANIC_CAPS );
+ /* Power up PHYs */
+ writel ( EXANIC_POWER_ON, ( exanic->regs + EXANIC_POWER ) );
+
/* Fetch base MAC address */
if ( ( rc = exanic_fetch_mac ( exanic ) ) != 0 )
goto err_fetch_mac;
/** I2C GPIO register */
#define EXANIC_I2C 0x012c
+/** Power control register */
+#define EXANIC_POWER 0x0138
+#define EXANIC_POWER_ON 0x000000f0UL /**< Power on PHYs */
+
/** Port register offset */
#define EXANIC_PORT_REGS( index ) ( 0x0200 + ( 0x40 * (index) ) )