clk: renesas: rzg2l: Re-assert reset on deassert timeout

Prevent issues during reset deassertion by re-asserting the reset if a
timeout occurs when trying to deassert. This ensures the reset line is in a
known state and improves reliability for hardware that may not immediately
clear the reset monitor bit.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Link: https://lore.kernel.org/20250903082757.115778-3-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index e0e1bebd98950e6ffa07f940d0ee46e263fa27e3..07909e80bae24e02a70324b49d9fd0df4097c55a 100644 (file)
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -1667,8 +1667,14 @@ static int __rzg2l_cpg_assert(struct reset_controller_dev *rcdev,
                return 0;
        }
 
-       return readl_poll_timeout_atomic(priv->base + reg, value,
-                                        assert == !!(value & mask), 10, 200);
+       ret = readl_poll_timeout_atomic(priv->base + reg, value,
+                                       assert == !!(value & mask), 10, 200);
+       if (ret && !assert) {
+               value = mask << 16;
+               writel(value, priv->base + CLK_RST_R(info->resets[id].off));
+       }
+
+       return ret;
 }
 
 static int rzg2l_cpg_assert(struct reset_controller_dev *rcdev,