perf/amd/ibs: Define macro for ldlat mask and shift

Load latency filter threshold is encoded in config1[11:0]. Define a mask
for it instead of hardcoded 0xFFF. Unlike "config" fields whose layout
maps to PERF_{FETCH|OP}_CTL MSR, layout of "config1" is custom defined
so a new set of macros are needed for "config1" fields.

Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Link: https://patch.msgid.link/20260216042530.1546-2-ravi.bangoria@amd.com

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 32e6456cb5e581b77f47920297b05934ecb31266..2e8fb0615226915596de833d9de280f2ebed94aa 100644 (file)
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -32,6 +32,9 @@ static u32 ibs_caps;
 /* attr.config2 */
 #define IBS_SW_FILTER_MASK     1
 
+/* attr.config1 */
+#define IBS_OP_CONFIG1_LDLAT_MASK              (0xFFFULL <<  0)
+
 /*
  * IBS states:
  *
@@ -274,7 +277,7 @@ static bool perf_ibs_ldlat_event(struct perf_ibs *perf_ibs,
 {
        return perf_ibs == &perf_ibs_op &&
               (ibs_caps & IBS_CAPS_OPLDLAT) &&
-              (event->attr.config1 & 0xFFF);
+              (event->attr.config1 & IBS_OP_CONFIG1_LDLAT_MASK);
 }
 
 static int perf_ibs_init(struct perf_event *event)
@@ -352,13 +355,13 @@ static int perf_ibs_init(struct perf_event *event)
        }
 
        if (perf_ibs_ldlat_event(perf_ibs, event)) {
-               u64 ldlat = event->attr.config1 & 0xFFF;
+               u64 ldlat = event->attr.config1 & IBS_OP_CONFIG1_LDLAT_MASK;
 
                if (ldlat < 128 || ldlat > 2048)
                        return -EINVAL;
                ldlat >>= 7;
 
-               config |= (ldlat - 1) << 59;
+               config |= (ldlat - 1) << IBS_OP_LDLAT_THRSH_SHIFT;
 
                config |= IBS_OP_LDLAT_EN;
                if (cpu_feature_enabled(X86_FEATURE_ZEN5))
@@ -1305,7 +1308,7 @@ fail:
                 * within [128, 2048] range.
                 */
                if (!op_data3.ld_op || !op_data3.dc_miss ||
-                   op_data3.dc_miss_lat <= (event->attr.config1 & 0xFFF)) {
+                   op_data3.dc_miss_lat <= (event->attr.config1 & IBS_OP_CONFIG1_LDLAT_MASK)) {
                        throttle = perf_event_account_interrupt(event);
                        goto out;
                }

diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index ff5acb8b199b0fac76c604c7348391244e27d2f0..67ecb989408edbe19db3227ecfaf19127762aabf 100644 (file)
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -671,6 +671,7 @@ struct arch_pebs_cntr_header {
  */
 #define IBS_OP_LDLAT_EN                (1ULL<<63)
 #define IBS_OP_LDLAT_THRSH     (0xFULL<<59)
+#define IBS_OP_LDLAT_THRSH_SHIFT       (59)
 #define IBS_OP_CUR_CNT         (0xFFF80ULL<<32)
 #define IBS_OP_CUR_CNT_RAND    (0x0007FULL<<32)
 #define IBS_OP_CUR_CNT_EXT_MASK        (0x7FULL<<52)