board: toradex: Make A53 get RAM size from DT in K3 boards

`dram_init()` is called by R5 SPL and U-Boot, both. It starts by
computing the size of the RAM. In verdin-am62(p), it does so by calling
`get_ram_size()`. This function computes the size of the RAM by writing
over the RAM.

When R5 computes the size of the RAM, it does not update the DT with
this size. As a result, when A53 invokes `dram_init()` again, it has to
compute the size through `get_ram_size()` again.

Commit 13c54cf588d82 and 0c3a6f748c9 add firewall over ATF's and OPTEE's
regions. This firewall is added during the R5 SPL stage of boot. So when
A53 attempts to write over RAM in `get_ram_size()`, it writes over the
protected region. Since A53 is a non-secure core, this is blocked by the
firewall.

To fix this, do the following:
    * Implement `spl_perform_board_fixups()` function for verdin-am62
      and verdin-am62p. Make this function call `fixup_memory_node()`,
      which updates the DT.
    * Add an if-block in `dram_init()`, to ensure that only R5 is able
      to call `get_ram_size()`, and that A53 reads this size from the
      DT.

Signed-off-by: Suhaas Joshi <s-joshi@ti.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>

diff --git a/board/toradex/verdin-am62/verdin-am62.c b/board/toradex/verdin-am62/verdin-am62.c
index 069aa6c7909df485fcce1532073c8f330f493d54..19ac2ae93136daf323d1a0ab7b2493c66273d272 100644 (file)
--- a/board/toradex/verdin-am62/verdin-am62.c
+++ b/board/toradex/verdin-am62/verdin-am62.c
@@ -24,6 +24,9 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init(void)
 {
+       if (!IS_ENABLED(CONFIG_TARGET_VERDIN_AM62_R5) || !IS_ENABLED(CONFIG_SPL_BUILD))
+               return fdtdec_setup_mem_size_base();
+
        gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE, CFG_SYS_SDRAM_SIZE);
 
        if (gd->ram_size < SZ_512M)
@@ -103,6 +106,13 @@ int board_late_init(void)
        return 0;
 }
 
+#if IS_ENABLED(CONFIG_XPL_BUILD)
+void spl_perform_board_fixups(struct spl_image_info *spl_image)
+{
+       fixup_memory_node(spl_image);
+}
+#endif
+
 #define CTRLMMR_USB0_PHY_CTRL          0x43004008
 #define CTRLMMR_USB1_PHY_CTRL          0x43004018
 #define CORE_VOLTAGE                   0x80000000

diff --git a/board/toradex/verdin-am62p/verdin-am62p.c b/board/toradex/verdin-am62p/verdin-am62p.c
index 7c631f380ff04fd78047e1a0ea731ab6fe2a848e..1234b3887c6a499e6298489cabca0e2b46533709 100644 (file)
--- a/board/toradex/verdin-am62p/verdin-am62p.c
+++ b/board/toradex/verdin-am62p/verdin-am62p.c
@@ -18,6 +18,7 @@
 #include <k3-ddrss.h>
 #include <spl.h>
 #include <linux/sizes.h>
+#include <mach/k3-ddr.h>
 
 #include "../common/tdx-cfg-block.h"
 
@@ -57,6 +58,9 @@ static void read_hw_cfg(void)
 
 int dram_init(void)
 {
+       if (!IS_ENABLED(CONFIG_TARGET_VERDIN_AM62P_R5) || !IS_ENABLED(CONFIG_SPL_BUILD))
+               return fdtdec_setup_mem_size_base();
+
        gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE, CFG_SYS_SDRAM_SIZE);
 
        if (gd->ram_size < SZ_1G)
@@ -132,6 +136,13 @@ int board_late_init(void)
        return 0;
 }
 
+#if IS_ENABLED(CONFIG_XPL_BUILD)
+void spl_perform_board_fixups(struct spl_image_info *spl_image)
+{
+       fixup_memory_node(spl_image);
+}
+#endif
+
 #define MCU_CTRL_LFXOSC_32K_BYPASS_VAL BIT(4)
 
 void spl_board_init(void)