media: v4l2-ctrls: Add hevc_ext_sps_[ls]t_rps controls

The vdpu381 decoder found on newer Rockchip SoC need the information
from the long term and short term ref pic sets from the SPS.

So far, it wasn't included in the v4l2 API, so add it with new dynamic
sized controls.

Each element of the hevc_ext_sps_lt_rps array contains the long term ref
pic set at that index.
Each element of the hevc_ext_sps_st_rps contains the short term ref pic
set at that index, as the raw data.
It is the role of the drivers to calculate the reference sets values.

Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>

diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c
index 1d4b5859f0e26146458cf8c08ea1108806472729..79a157975f70944d2834563ec1e5f9fac133eda2 100644 (file)
--- a/drivers/media/v4l2-core/v4l2-ctrls-core.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c
@@ -424,6 +424,12 @@ void v4l2_ctrl_type_op_log(const struct v4l2_ctrl *ctrl)
        case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
                pr_cont("HEVC_SLICE_PARAMS");
                break;
+       case V4L2_CTRL_TYPE_HEVC_EXT_SPS_ST_RPS:
+               pr_cont("HEVC_EXT_SPS_ST_RPS");
+               break;
+       case V4L2_CTRL_TYPE_HEVC_EXT_SPS_LT_RPS:
+               pr_cont("HEVC_EXT_SPS_LT_RPS");
+               break;
        case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX:
                pr_cont("HEVC_SCALING_MATRIX");
                break;
@@ -961,6 +967,8 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx,
        struct v4l2_ctrl_h264_pred_weights *p_h264_pred_weights;
        struct v4l2_ctrl_h264_slice_params *p_h264_slice_params;
        struct v4l2_ctrl_h264_decode_params *p_h264_dec_params;
+       struct v4l2_ctrl_hevc_ext_sps_lt_rps *p_hevc_lt_rps;
+       struct v4l2_ctrl_hevc_ext_sps_st_rps *p_hevc_st_rps;
        struct v4l2_ctrl_hevc_sps *p_hevc_sps;
        struct v4l2_ctrl_hevc_pps *p_hevc_pps;
        struct v4l2_ctrl_hdr10_mastering_display *p_hdr10_mastering;
@@ -1254,6 +1262,20 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx,
        case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
                break;
 
+       case V4L2_CTRL_TYPE_HEVC_EXT_SPS_ST_RPS:
+               p_hevc_st_rps = p;
+
+               if (p_hevc_st_rps->flags & ~V4L2_HEVC_EXT_SPS_ST_RPS_FLAG_INTER_REF_PIC_SET_PRED)
+                       return -EINVAL;
+               break;
+
+       case V4L2_CTRL_TYPE_HEVC_EXT_SPS_LT_RPS:
+               p_hevc_lt_rps = p;
+
+               if (p_hevc_lt_rps->flags & ~V4L2_HEVC_EXT_SPS_LT_RPS_FLAG_USED_LT)
+                       return -EINVAL;
+               break;
+
        case V4L2_CTRL_TYPE_HDR10_CLL_INFO:
                break;
 
@@ -2006,6 +2028,12 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,
        case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
                elem_size = sizeof(struct v4l2_ctrl_hevc_slice_params);
                break;
+       case V4L2_CTRL_TYPE_HEVC_EXT_SPS_ST_RPS:
+               elem_size = sizeof(struct v4l2_ctrl_hevc_ext_sps_st_rps);
+               break;
+       case V4L2_CTRL_TYPE_HEVC_EXT_SPS_LT_RPS:
+               elem_size = sizeof(struct v4l2_ctrl_hevc_ext_sps_lt_rps);
+               break;
        case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX:
                elem_size = sizeof(struct v4l2_ctrl_hevc_scaling_matrix);
                break;

diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c
index 765aeeec84fe5e9546aaa13bea6e8ea684d78e21..551426c4cd01638ed2bc1dc085c2a9f4a72f1588 100644 (file)
--- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c
@@ -1235,6 +1235,8 @@ const char *v4l2_ctrl_get_name(u32 id)
        case V4L2_CID_STATELESS_HEVC_DECODE_MODE:               return "HEVC Decode Mode";
        case V4L2_CID_STATELESS_HEVC_START_CODE:                return "HEVC Start Code";
        case V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS:       return "HEVC Entry Point Offsets";
+       case V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS:            return "HEVC Short Term Ref Sets";
+       case V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS:            return "HEVC Long Term Ref Sets";
        case V4L2_CID_STATELESS_AV1_SEQUENCE:                   return "AV1 Sequence Parameters";
        case V4L2_CID_STATELESS_AV1_TILE_GROUP_ENTRY:           return "AV1 Tile Group Entry";
        case V4L2_CID_STATELESS_AV1_FRAME:                      return "AV1 Frame Parameters";
@@ -1581,6 +1583,14 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
                *type = V4L2_CTRL_TYPE_U32;
                *flags |= V4L2_CTRL_FLAG_DYNAMIC_ARRAY;
                break;
+       case V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS:
+               *type = V4L2_CTRL_TYPE_HEVC_EXT_SPS_ST_RPS;
+               *flags |= V4L2_CTRL_FLAG_DYNAMIC_ARRAY;
+               break;
+       case V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS:
+               *type = V4L2_CTRL_TYPE_HEVC_EXT_SPS_LT_RPS;
+               *flags |= V4L2_CTRL_FLAG_DYNAMIC_ARRAY;
+               break;
        case V4L2_CID_STATELESS_VP9_COMPRESSED_HDR:
                *type = V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR;
                break;

diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index 572622e4535e6a142302c5f1d24df874a2a47aa5..68dd0c4e47b2d7baea7ac20da78715e153d44f21 100644 (file)
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -2101,6 +2101,8 @@ struct v4l2_ctrl_mpeg2_quantisation {
 #define V4L2_CID_STATELESS_HEVC_DECODE_MODE    (V4L2_CID_CODEC_STATELESS_BASE + 405)
 #define V4L2_CID_STATELESS_HEVC_START_CODE     (V4L2_CID_CODEC_STATELESS_BASE + 406)
 #define V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS (V4L2_CID_CODEC_STATELESS_BASE + 407)
+#define V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS  (V4L2_CID_CODEC_STATELESS_BASE + 408)
+#define V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS  (V4L2_CID_CODEC_STATELESS_BASE + 409)
 
 enum v4l2_stateless_hevc_decode_mode {
        V4L2_STATELESS_HEVC_DECODE_MODE_SLICE_BASED,
@@ -2556,6 +2558,65 @@ struct v4l2_ctrl_hevc_scaling_matrix {
        __u8    scaling_list_dc_coef_32x32[2];
 };
 
+#define V4L2_HEVC_EXT_SPS_ST_RPS_FLAG_INTER_REF_PIC_SET_PRED   0x1
+
+/*
+ * struct v4l2_ctrl_hevc_ext_sps_st_rps - HEVC short term RPS parameters
+ *
+ * Dynamic size 1-dimension array for short term RPS. The number of elements
+ * is v4l2_ctrl_hevc_sps::num_short_term_ref_pic_sets. It can contain up to 65 elements.
+ *
+ * @delta_idx_minus1: Specifies the delta compare to the index. See details in section 7.4.8
+ *                    "Short-term reference picture set semantics" of the specification.
+ * @delta_rps_sign: Sign of the delta as specified in section 7.4.8 "Short-term reference picture
+ *                  set semantics" of the specification.
+ * @abs_delta_rps_minus1: Absolute delta RPS as specified in section 7.4.8 "Short-term reference
+ *                        picture set semantics" of the specification.
+ * @num_negative_pics: Number of short-term RPS entries that have picture order count values less
+ *                     than the picture order count value of the current picture.
+ * @num_positive_pics: Number of short-term RPS entries that have picture order count values
+ *                     greater than the picture order count value of the current picture.
+ * @used_by_curr_pic: Bit j specifies if short-term RPS j is used by the current picture.
+ * @use_delta_flag: Bit j equals to 1 specifies that the j-th entry in the source candidate
+ *                  short-term RPS is included in this candidate short-term RPS.
+ * @delta_poc_s0_minus1: Specifies the negative picture order count delta for the i-th entry in
+ *                       the short-term RPS. See details in section 7.4.8 "Short-term reference
+ *                       picture set semantics" of the specification.
+ * @delta_poc_s1_minus1: Specifies the positive picture order count delta for the i-th entry in
+ *                       the short-term RPS. See details in section 7.4.8 "Short-term reference
+ *                       picture set semantics" of the specification.
+ * @flags: See V4L2_HEVC_EXT_SPS_ST_RPS_FLAG_{}
+ */
+struct v4l2_ctrl_hevc_ext_sps_st_rps {
+       __u8    delta_idx_minus1;
+       __u8    delta_rps_sign;
+       __u8    num_negative_pics;
+       __u8    num_positive_pics;
+       __u32   used_by_curr_pic;
+       __u32   use_delta_flag;
+       __u16   abs_delta_rps_minus1;
+       __u16   delta_poc_s0_minus1[16];
+       __u16   delta_poc_s1_minus1[16];
+       __u16   flags;
+};
+
+#define V4L2_HEVC_EXT_SPS_LT_RPS_FLAG_USED_LT          0x1
+
+/*
+ * struct v4l2_ctrl_hevc_ext_sps_lt_rps - HEVC long term RPS parameters
+ *
+ * Dynamic size 1-dimension array for long term RPS. The number of elements
+ * is v4l2_ctrl_hevc_sps::num_long_term_ref_pics_sps. It can contain up to 65 elements.
+ *
+ * @lt_ref_pic_poc_lsb_sps: picture order count modulo MaxPicOrderCntLsb of the i-th candidate
+ *                          long-term reference picture.
+ * @flags: See V4L2_HEVC_EXT_SPS_LT_RPS_FLAG_{}
+ */
+struct v4l2_ctrl_hevc_ext_sps_lt_rps {
+       __u16   lt_ref_pic_poc_lsb_sps;
+       __u16   flags;
+};
+
 /* Stateless VP9 controls */
 
 #define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED        0x1

diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 848e86617d5c87d76f15663403c2f3f0e709073b..eda4492e40dc14a90a230601d8e23b0e13845d34 100644 (file)
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -1986,6 +1986,8 @@ enum v4l2_ctrl_type {
        V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS        = 0x0272,
        V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX      = 0x0273,
        V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS       = 0x0274,
+       V4L2_CTRL_TYPE_HEVC_EXT_SPS_ST_RPS      = 0x0275,
+       V4L2_CTRL_TYPE_HEVC_EXT_SPS_LT_RPS      = 0x0276,
 
        V4L2_CTRL_TYPE_AV1_SEQUENCE         = 0x280,
        V4L2_CTRL_TYPE_AV1_TILE_GROUP_ENTRY = 0x281,