drm/amdgpu: Disable TCP Early Write Ack for GFX 12.1

Disable the TCP Early Write Ack feature on GFX 12.1.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
index 1f567bd6cc4602d5f29c789d8b3d45d85ee22745..7d4b241fc3a409eb935e87c50e6ce4d7a1c6fa00 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
@@ -2657,6 +2657,17 @@ static void gfx_v12_1_xcc_disable_burst(struct amdgpu_device *adev,
        WREG32_SOC15(GC, GET_INST(GC, xcc_id), regGLARB_DRAM_BURST_CTRL, 0xf);
 }
 
+static void gfx_v12_1_xcc_disable_early_write_ack(struct amdgpu_device *adev,
+                                       int xcc_id)
+{
+       uint32_t data;
+
+       data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regTCP_CNTL3);
+       data = REG_SET_FIELD(data, TCP_CNTL3, DISABLE_EARLY_WRITE_ACK, 0x1);
+
+       WREG32_SOC15(GC, GET_INST(GC, xcc_id), regTCP_CNTL3, data);
+}
+
 static void gfx_v12_1_init_golden_registers(struct amdgpu_device *adev)
 {
        int i;
@@ -2665,6 +2676,7 @@ static void gfx_v12_1_init_golden_registers(struct amdgpu_device *adev)
                gfx_v12_1_xcc_disable_burst(adev, i);
                gfx_v12_1_xcc_enable_atomics(adev, i);
                gfx_v12_1_xcc_setup_tcp_thrashing_ctrl(adev, i);
+               gfx_v12_1_xcc_disable_early_write_ack(adev, i);
        }
 }