Handle a couple more AVX floating point comparison cases.

git-svn-id: svn://svn.valgrind.org/vex/trunk@2411

diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c
index 418863bf36003e93b5a4062606145e4f22835176..932e2fedf08d91973467f5cb3bbdc177fe8cfd92 100644 (file)
--- a/VEX/priv/guest_amd64_toIR.c
+++ b/VEX/priv/guest_amd64_toIR.c
@@ -8594,20 +8594,43 @@ static Bool findSSECmpOp ( /*OUT*/Bool* preSwapP,
    Bool not = False;
 
 #  define XXX(_pre, _op, _not) { pre = _pre; op = _op; not = _not; }
+   // If you add a case here, add a corresponding test for both VCMPSD_128
+   // and VCMPSS_128 in avx-1.c.
    switch (imm8) {
-      case 0x0: XXX(False, Iop_CmpEQ32Fx4, False); break; // EQ
-      case 0x1: XXX(False, Iop_CmpLT32Fx4, False); break; // LT
-      case 0x2: XXX(False, Iop_CmpLE32Fx4, False); break; // LE
-      case 0x3: XXX(False, Iop_CmpUN32Fx4, False); break; // UNORD
-      case 0x4: XXX(False, Iop_CmpEQ32Fx4, True);  break; // NE
-      case 0x5: XXX(False, Iop_CmpLT32Fx4, True);  break; // NLT
-      case 0x6: XXX(False, Iop_CmpLE32Fx4, True);  break; // NLE
-      case 0x7: XXX(False, Iop_CmpUN32Fx4, True);  break; // ORD
+      // "O" = ordered, "Q" = non-signalling (quiet), "S" = signalling
+      case 0x0:  XXX(False, Iop_CmpEQ32Fx4, False); break; // EQ_OQ
+      case 0x1:  XXX(False, Iop_CmpLT32Fx4, False); break; // LT_OS
+      case 0x2:  XXX(False, Iop_CmpLE32Fx4, False); break; // LE_OS
+      case 0x3:  XXX(False, Iop_CmpUN32Fx4, False); break; // UNORD_Q
+      case 0x4:  XXX(False, Iop_CmpEQ32Fx4, True);  break; // NEQ_UQ
+      case 0x5:  XXX(False, Iop_CmpLT32Fx4, True);  break; // NLT_US
+      case 0x6:  XXX(False, Iop_CmpLE32Fx4, True);  break; // NLE_US
+      case 0x7:  XXX(False, Iop_CmpUN32Fx4, True);  break; // ORD_Q
+      // 0x8  EQ_UQ
+      // 0x9  NGE_US
       /* "Enhanced Comparison Predicate[s] for VEX-Encoded [insns] */
-      case 0xA: XXX(True,  Iop_CmpLT32Fx4, True);  break; // NGT_US
-      case 0xC: XXX(False, Iop_CmpEQ32Fx4, True);  break; // NEQ_OQ
-      case 0xD: XXX(True,  Iop_CmpLE32Fx4, False); break; // GE_OS
-      case 0xE: XXX(True,  Iop_CmpLT32Fx4, False); break; // GT_OS
+      case 0xA:  XXX(True,  Iop_CmpLT32Fx4, True);  break; // NGT_US
+      // 0xB  FALSE_OQ
+      case 0xC:  XXX(False, Iop_CmpEQ32Fx4, True);  break; // NEQ_OQ
+      case 0xD:  XXX(True,  Iop_CmpLE32Fx4, False); break; // GE_OS
+      case 0xE:  XXX(True,  Iop_CmpLT32Fx4, False); break; // GT_OS
+      // 0xF  TRUE_UQ
+      // 0x10  EQ_OS
+      case 0x11: XXX(False, Iop_CmpLT32Fx4, False); break; // LT_OQ
+      case 0x12: XXX(False, Iop_CmpLE32Fx4, False); break; // LE_OQ
+      // 0x13  UNORD_S
+      // 0x14  NEQ_US
+      // 0x15  NLT_UQ
+      case 0x16: XXX(False, Iop_CmpLE32Fx4, True);  break; // NLE_UQ
+      // 0x17  ORD_S
+      // 0x18  EQ_US
+      // 0x19  NGE_UQ
+      // 0x1A  NGT_UQ
+      // 0x1B  FALSE_OS
+      // 0x1C  NEQ_OS
+      // 0x1D  GE_OQ
+      case 0x1E: XXX(True,  Iop_CmpLT32Fx4, False); break; // GT_OQ
+      // 0x1F  TRUE_US
       /* Don't forget to add test cases to VCMPSS_128_<imm8> in
          avx-1.c if new cases turn up. */
       default: break;