]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: qcom: sc8280xp: Fix shifted GPI DMA channels
authorPengyu Luo <mitltlatltl@gmail.com>
Mon, 13 Oct 2025 11:55:05 +0000 (19:55 +0800)
committerBjorn Andersson <andersson@kernel.org>
Mon, 27 Oct 2025 17:06:13 +0000 (12:06 -0500)
The GPI DMA channels in sc8280xp.dtsi are wrong. Let's fix it.

Origianl patch was rebased to the linux-next and formated to a new
patch again later, then it got the GPI DMA channels in the new patch
shifted.

Fixes: 71b12166a2be ("arm64: dts: qcom: sc8280xp: Describe GPI DMA controller nodes")
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251013115506.103649-1-mitltlatltl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sc8280xp.dtsi

index e48efbd13bfa8dba71928ef11b80ac27eb4b6f85..7b89d3d422ea62012daeb423e457a20e84eeb0b5 100644 (file)
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 6 QCOM_GPI_SPI>,
-                                      <&gpi_dma2 1 6 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 0 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
-                                      <&gpi_dma2 1 0 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 0 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
-                                      <&gpi_dma2 1 0 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 1 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
-                                      <&gpi_dma2 1 1 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 1 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
-                                      <&gpi_dma2 1 1 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 2 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
-                                      <&gpi_dma2 1 2 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 2 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
-                                      <&gpi_dma2 1 2 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 3 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
-                                      <&gpi_dma2 1 3 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 3 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
-                                      <&gpi_dma2 1 3 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
+                                      <&gpi_dma2 1 4 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
-                                      <&gpi_dma2 1 4 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 4 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
-                                      <&gpi_dma2 1 4 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 5 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
-                                      <&gpi_dma2 1 5 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma2 0 6 QCOM_GPI_SPI>,
+                                      <&gpi_dma2 1 6 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                        };
                };
 
-               gpi_dma0: dma-controller@900000  {
+               gpi_dma0: dma-controller@900000 {
                        compatible = "qcom,sc8280xp-gpi-dma", "qcom,sm6350-gpi-dma";
                        reg = <0 0x00900000 0 0x60000>;
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>,
-                                      <&gpi_dma0 1 7 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 0 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
-                                      <&gpi_dma0 1 0 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 0 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
-                                      <&gpi_dma0 1 0 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 1 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
-                                      <&gpi_dma0 1 1 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 1 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
-                                      <&gpi_dma0 1 1 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 2 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
-                                      <&gpi_dma0 1 2 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 2 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
-                                      <&gpi_dma0 1 2 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 3 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
-                                      <&gpi_dma0 1 3 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 3 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
-                                      <&gpi_dma0 1 3 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 4 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
-                                      <&gpi_dma0 1 4 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 4 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
-                                      <&gpi_dma0 1 4 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 5 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
-                                      <&gpi_dma0 1 5 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 5 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
-                                      <&gpi_dma0 1 5 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 6 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
-                                      <&gpi_dma0 1 6 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
+                                      <&gpi_dma0 1 6 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
-                                      <&gpi_dma0 1 6 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>,
+                                      <&gpi_dma0 1 7 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
-                                      <&gpi_dma1 1 7 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 0 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
-                                      <&gpi_dma1 1 0 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 0 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
-                                      <&gpi_dma1 1 0 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 1 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
-                                      <&gpi_dma1 1 1 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 1 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
-                                      <&gpi_dma1 1 1 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 2 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
-                                      <&gpi_dma1 1 2 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 2 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
-                                      <&gpi_dma1 1 2 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 3 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
-                                      <&gpi_dma1 1 3 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 3 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
-                                      <&gpi_dma1 1 3 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 4 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
-                                      <&gpi_dma1 1 4 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 4 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
-                                      <&gpi_dma1 1 4 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 5 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
-                                      <&gpi_dma1 1 5 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 5 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
-                                      <&gpi_dma1 1 5 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 6 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
-                                      <&gpi_dma1 1 6 QCOM_GPI_I2C>;
+                               dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
+                                      <&gpi_dma1 1 6 QCOM_GPI_SPI>;
                                dma-names = "tx",
                                            "rx";
 
                                                <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
 
-                               dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
-                                      <&gpi_dma1 1 6 QCOM_GPI_SPI>;
+                               dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
+                                      <&gpi_dma1 1 7 QCOM_GPI_I2C>;
                                dma-names = "tx",
                                            "rx";