wifi: rtw89: phy: abstract start address and EHT of PHY status bitmap

Select PHY status being reported by a set of addresses. Abstract the
address and EHT bitmap to share common flow.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260114013950.19704-5-pkshih@realtek.com

diff --git a/drivers/net/wireless/realtek/rtw89/phy.c b/drivers/net/wireless/realtek/rtw89/phy.c
index 20d3f3a42b4bee877d0ccbdf969862dfc4b9fd4a..3ae540a6fa4f64311028ce2977a2f746f8649b03 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/phy.c
+++ b/drivers/net/wireless/realtek/rtw89/phy.c
@@ -6407,14 +6407,16 @@ static bool rtw89_physts_ie_page_valid(struct rtw89_dev *rtwdev,
        return true;
 }
 
-static u32 rtw89_phy_get_ie_bitmap_addr(enum rtw89_phy_status_bitmap ie_page)
+static u32 rtw89_phy_get_ie_bitmap_addr(struct rtw89_dev *rtwdev,
+                                       enum rtw89_phy_status_bitmap ie_page)
 {
+       const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
        static const u8 ie_page_shift = 2;
 
        if (ie_page == RTW89_EHT_PKT)
-               return R_PHY_STS_BITMAP_EHT;
+               return phy->physt_bmp_eht;
 
-       return R_PHY_STS_BITMAP_ADDR_START + (ie_page << ie_page_shift);
+       return phy->physt_bmp_start + (ie_page << ie_page_shift);
 }
 
 static u32 rtw89_physts_get_ie_bitmap(struct rtw89_dev *rtwdev,
@@ -6426,7 +6428,7 @@ static u32 rtw89_physts_get_ie_bitmap(struct rtw89_dev *rtwdev,
        if (!rtw89_physts_ie_page_valid(rtwdev, &ie_page))
                return 0;
 
-       addr = rtw89_phy_get_ie_bitmap_addr(ie_page);
+       addr = rtw89_phy_get_ie_bitmap_addr(rtwdev, ie_page);
 
        return rtw89_phy_read32_idx(rtwdev, addr, MASKDWORD, phy_idx);
 }
@@ -6444,7 +6446,7 @@ static void rtw89_physts_set_ie_bitmap(struct rtw89_dev *rtwdev,
        if (chip->chip_id == RTL8852A)
                val &= B_PHY_STS_BITMAP_MSK_52A;
 
-       addr = rtw89_phy_get_ie_bitmap_addr(ie_page);
+       addr = rtw89_phy_get_ie_bitmap_addr(rtwdev, ie_page);
        rtw89_phy_write32_idx(rtwdev, addr, MASKDWORD, val, phy_idx);
 }
 
@@ -6468,6 +6470,17 @@ static void rtw89_physts_enable_fail_report(struct rtw89_dev *rtwdev,
        }
 }
 
+static void rtw89_physts_enable_hdr_2(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
+{
+       const struct rtw89_chip_info *chip = rtwdev->chip;
+
+       if (chip->chip_gen == RTW89_CHIP_AX || chip->chip_id == RTL8922A)
+               return;
+
+       rtw89_phy_write32_idx_set(rtwdev, R_STS_HDR2_PARSING_BE4,
+                                 B_STS_HDR2_PARSING_BE4, phy_idx);
+}
+
 static void __rtw89_physts_parsing_init(struct rtw89_dev *rtwdev,
                                        enum rtw89_phy_idx phy_idx)
 {
@@ -6477,6 +6490,9 @@ static void __rtw89_physts_parsing_init(struct rtw89_dev *rtwdev,
 
        rtw89_physts_enable_fail_report(rtwdev, false, phy_idx);
 
+       /* enable hdr_2 for 8922D (PHYSTS_BE_GEN2 above) */
+       rtw89_physts_enable_hdr_2(rtwdev, phy_idx);
+
        for (i = 0; i < RTW89_PHYSTS_BITMAP_NUM; i++) {
                if (i == RTW89_RSVD_9 ||
                    (i == RTW89_EHT_PKT && chip->chip_gen == RTW89_CHIP_AX))
@@ -6842,6 +6858,9 @@ static void rtw89_phy_dig_sdagc_follow_pagc_config(struct rtw89_dev *rtwdev,
 {
        const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs;
 
+       if (rtwdev->chip->chip_gen != RTW89_CHIP_AX)
+               return;
+
        rtw89_phy_write32_idx(rtwdev, dig_regs->p0_p20_pagcugc_en.addr,
                              dig_regs->p0_p20_pagcugc_en.mask, enable, bb->phy_idx);
        rtw89_phy_write32_idx(rtwdev, dig_regs->p0_s20_pagcugc_en.addr,
@@ -8211,6 +8230,8 @@ static const struct rtw89_cfo_regs rtw89_cfo_regs_ax = {
 
 const struct rtw89_phy_gen_def rtw89_phy_gen_ax = {
        .cr_base = 0x10000,
+       .physt_bmp_start = R_PHY_STS_BITMAP_ADDR_START,
+       .physt_bmp_eht = 0xfc,
        .ccx = &rtw89_ccx_regs_ax,
        .physts = &rtw89_physts_regs_ax,
        .cfo = &rtw89_cfo_regs_ax,

diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index 02bbb975ce654bd729a483dfe165daf6145c32b4..8506c607de4d7a7502db5f1e24bc6fa176873542 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -531,6 +531,8 @@ struct rtw89_phy_rfk_log_fmt {
 
 struct rtw89_phy_gen_def {
        u32 cr_base;
+       u32 physt_bmp_start;
+       u32 physt_bmp_eht;
        const struct rtw89_ccx_regs *ccx;
        const struct rtw89_physts_regs *physts;
        const struct rtw89_cfo_regs *cfo;

diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index 895615df5d7e9e77222d34640f42d11c677edb40..a609cd0c526884d2efb1a4f53945cecb03070cdf 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -1112,6 +1112,8 @@ static void rtw89_phy_set_txpwr_limit_ru_be(struct rtw89_dev *rtwdev,
 
 const struct rtw89_phy_gen_def rtw89_phy_gen_be = {
        .cr_base = 0x20000,
+       .physt_bmp_start = R_PHY_STS_BITMAP_ADDR_START,
+       .physt_bmp_eht = R_PHY_STS_BITMAP_EHT,
        .ccx = &rtw89_ccx_regs_be,
        .physts = &rtw89_physts_regs_be,
        .cfo = &rtw89_cfo_regs_be,
@@ -1130,6 +1132,8 @@ EXPORT_SYMBOL(rtw89_phy_gen_be);
 
 const struct rtw89_phy_gen_def rtw89_phy_gen_be_v1 = {
        .cr_base = 0x0,
+       .physt_bmp_start = R_PHY_STS_BITMAP_ADDR_START_BE4,
+       .physt_bmp_eht = R_PHY_STS_BITMAP_EHT_BE4,
        .ccx = &rtw89_ccx_regs_be_v1,
        .physts = &rtw89_physts_regs_be_v1,
        .cfo = &rtw89_cfo_regs_be_v1,

diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index 4d8329742f8c3da63a4d5f19d4066becc697d83b..115d3b0084522ed135612678c01b17142461dd06 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -8695,6 +8695,7 @@
 #define B_STS_DIS_TRIG_BY_FAIL BIT(3)
 #define B_STS_DIS_TRIG_BY_BRK BIT(2)
 #define R_PHY_STS_BITMAP_ADDR_START R_PHY_STS_BITMAP_SEARCH_FAIL
+#define R_PHY_STS_BITMAP_ADDR_START_BE4 0x2073C
 #define B_PHY_STS_BITMAP_ADDR_MASK GENMASK(6, 2)
 #define R_PHY_STS_BITMAP_SEARCH_FAIL 0x073C
 #define B_PHY_STS_BITMAP_MSK_52A 0x337cff3f
@@ -8713,6 +8714,7 @@
 #define R_PHY_STS_BITMAP_VHT 0x0770
 #define R_PHY_STS_BITMAP_HE 0x0774
 #define R_PHY_STS_BITMAP_EHT 0x0788
+#define R_PHY_STS_BITMAP_EHT_BE4 0x20788
 #define R_EDCCA_RPTREG_SEL_BE 0x078C
 #define B_EDCCA_RPTREG_SEL_BE_MSK GENMASK(22, 20)
 #define R_PMAC_GNT 0x0980
@@ -10145,7 +10147,8 @@
 
 #define R_CHINFO_SEG_BE4 0x200B4
 #define B_CHINFO_SEG_LEN_BE4 GENMASK(12, 10)
-
+#define R_STS_HDR2_PARSING_BE4 0x2070C
+#define B_STS_HDR2_PARSING_BE4 BIT(10)
 #define R_SW_SI_WDATA_BE4 0x20370
 #define B_SW_SI_DATA_PATH_BE4 GENMASK(31, 28)
 #define B_SW_SI_DATA_ADR_BE4 GENMASK(27, 20)