]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
arm: [MVE intrinsics] factorize vdupq
authorChristophe Lyon <christophe.lyon@arm.com>
Tue, 21 Feb 2023 10:54:40 +0000 (10:54 +0000)
committerChristophe Lyon <christophe.lyon@arm.com>
Thu, 11 May 2023 08:25:09 +0000 (10:25 +0200)
Factorize vdup builtins so that they use parameterized names.

2022-10-25  Christophe Lyon  <christophe.lyon@arm.com>

gcc/
* config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
(MVE_FP_N_VDUPQ_ONLY): New.
(mve_insn): Add vdupq.
* config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
(@mve_<mve_insn>q_n_f<mode>): ... this.
(mve_vdupq_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.
(mve_vdupq_m_n_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
(mve_vdupq_m_n_f<mode>): Rename into ...
(@mve_<mve_insn>q_m_n_f<mode>): ... this.

gcc/config/arm/iterators.md
gcc/config/arm/mve.md

index 878210471c8b20c9d94bcc6a6e896c5b983cbeb1..aff4e7fb8149221220ecda1bdaade4933ca6de13 100644 (file)
                     VREV32Q_M_F
                     ])
 
+(define_int_iterator MVE_FP_M_N_VDUPQ_ONLY [
+                    VDUPQ_M_N_F
+                    ])
+
+(define_int_iterator MVE_FP_N_VDUPQ_ONLY [
+                    VDUPQ_N_F
+                    ])
+
 ;; MVE integer binary operations.
 (define_code_iterator MVE_INT_BINARY_RTX [plus minus mult])
 
                 (VCLSQ_S "vcls")
                 (VCLZQ_M_S "vclz") (VCLZQ_M_U "vclz")
                 (VCREATEQ_S "vcreate") (VCREATEQ_U "vcreate") (VCREATEQ_F "vcreate")
+                (VDUPQ_M_N_S "vdup") (VDUPQ_M_N_U "vdup") (VDUPQ_M_N_F "vdup")
+                (VDUPQ_N_S "vdup") (VDUPQ_N_U "vdup") (VDUPQ_N_F "vdup")
                 (VEORQ_M_S "veor") (VEORQ_M_U "veor") (VEORQ_M_F "veor")
                 (VHADDQ_M_N_S "vhadd") (VHADDQ_M_N_U "vhadd")
                 (VHADDQ_M_S "vhadd") (VHADDQ_M_U "vhadd")
index 4dfcd6c42808c5e140fbf46a647018f9fd5820a4..0c4e4e60bc45601a2b1f0cf228b8ee4ea511f35d 100644 (file)
 ;;
 ;; [vdupq_n_f])
 ;;
-(define_insn "mve_vdupq_n_f<mode>"
+(define_insn "@mve_<mve_insn>q_n_f<mode>"
   [
    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
        (unspec:MVE_0 [(match_operand:<V_elem> 1 "s_register_operand" "r")]
-        VDUPQ_N_F))
+        MVE_FP_N_VDUPQ_ONLY))
   ]
   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vdup.%#<V_sz_elem>\t%q0, %1"
+  "<mve_insn>.%#<V_sz_elem>\t%q0, %1"
   [(set_attr "type" "mve_move")
 ])
 
 ;;
 ;; [vdupq_n_u, vdupq_n_s])
 ;;
-(define_insn "mve_vdupq_n_<supf><mode>"
+(define_insn "@mve_<mve_insn>q_n_<supf><mode>"
   [
    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
        (unspec:MVE_2 [(match_operand:<V_elem> 1 "s_register_operand" "r")]
         VDUPQ_N))
   ]
   "TARGET_HAVE_MVE"
-  "vdup.%#<V_sz_elem>\t%q0, %1"
+  "<mve_insn>.%#<V_sz_elem>\t%q0, %1"
   [(set_attr "type" "mve_move")
 ])
 
 ;;
 ;; [vdupq_m_n_s, vdupq_m_n_u])
 ;;
-(define_insn "mve_vdupq_m_n_<supf><mode>"
+(define_insn "@mve_<mve_insn>q_m_n_<supf><mode>"
   [
    (set (match_operand:MVE_2 0 "s_register_operand" "=w")
        (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
         VDUPQ_M_N))
   ]
   "TARGET_HAVE_MVE"
-  "vpst\;vdupt.%#<V_sz_elem>\t%q0, %2"
+  "vpst\;<mve_insn>t.%#<V_sz_elem>\t%q0, %2"
   [(set_attr "type" "mve_move")
    (set_attr "length""8")])
 
 ;;
 ;; [vdupq_m_n_f])
 ;;
-(define_insn "mve_vdupq_m_n_f<mode>"
+(define_insn "@mve_<mve_insn>q_m_n_f<mode>"
   [
    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
        (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
                       (match_operand:<V_elem> 2 "s_register_operand" "r")
                       (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
-        VDUPQ_M_N_F))
+        MVE_FP_M_N_VDUPQ_ONLY))
   ]
   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vpst\;vdupt.%#<V_sz_elem>\t%q0, %2"
+  "vpst\;<mve_insn>t.%#<V_sz_elem>\t%q0, %2"
   [(set_attr "type" "mve_move")
    (set_attr "length""8")])