crypto: hisilicon/qm - remove unnecessary code in qm_mb_write()

Since the HiSilicon accelerator is used only on the
ARM64 architectures, the implementations for other
architectures are not needed, so remove the unnecessary code.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
index 49c1c78ff600b97c88cdc0e2c414cc1d6b2c7e82..2bb94e8c6a07d7c66d26f54fac7fd66b559baa96 100644 (file)
--- a/drivers/crypto/hisilicon/qm.c
+++ b/drivers/crypto/hisilicon/qm.c
@@ -596,19 +596,9 @@ EXPORT_SYMBOL_GPL(hisi_qm_wait_mb_ready);
 /* 128 bit should be written to hardware at one time to trigger a mailbox */
 static void qm_mb_write(struct hisi_qm *qm, const void *src)
 {
-       void __iomem *fun_base = qm->io_base + QM_MB_CMD_SEND_BASE;
-
-#if IS_ENABLED(CONFIG_ARM64)
-       unsigned long tmp0 = 0, tmp1 = 0;
-#endif
-
-       if (!IS_ENABLED(CONFIG_ARM64)) {
-               memcpy_toio(fun_base, src, 16);
-               dma_wmb();
-               return;
-       }
-
 #if IS_ENABLED(CONFIG_ARM64)
+       void __iomem *fun_base = qm->io_base + QM_MB_CMD_SEND_BASE;
+       unsigned long tmp0, tmp1;
        /*
         * The dmb oshst instruction ensures that the data in the
         * mailbox is written before it is sent to the hardware.