]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/msm/dpu: get rid of DPU_PINGPONG_DSC
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 22 May 2025 19:03:35 +0000 (22:03 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Fri, 4 Jul 2025 13:35:16 +0000 (16:35 +0300)
Continue migration to the MDSS-revision based checks and replace
DPU_PINGPONG_DSC feature bit with the core_major_ver < 7 check.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/655390/
Link: https://lore.kernel.org/r/20250522-dpu-drop-features-v5-16-3b2085a07884@oss.qualcomm.com
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

index 8fe07a5683f734a058e7e7250f0811e3b7b7cf07..0e8e71775f2c1c38af018353c85ffeb6ccddb42f 100644 (file)
@@ -181,28 +181,24 @@ static const struct dpu_pingpong_cfg msm8996_pp[] = {
        {
                .name = "pingpong_0", .id = PINGPONG_0,
                .base = 0x70000, .len = 0xd4,
-               .features = PINGPONG_MSM8996_MASK,
                .sblk = &msm8996_pp_sblk,
                .intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
                .intr_rdptr = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12),
        }, {
                .name = "pingpong_1", .id = PINGPONG_1,
                .base = 0x70800, .len = 0xd4,
-               .features = PINGPONG_MSM8996_MASK,
                .sblk = &msm8996_pp_sblk,
                .intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9),
                .intr_rdptr = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13),
        }, {
                .name = "pingpong_2", .id = PINGPONG_2,
                .base = 0x71000, .len = 0xd4,
-               .features = PINGPONG_MSM8996_MASK,
                .sblk = &msm8996_pp_sblk,
                .intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
                .intr_rdptr = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14),
        }, {
                .name = "pingpong_3", .id = PINGPONG_3,
                .base = 0x71800, .len = 0xd4,
-               .features = PINGPONG_MSM8996_MASK,
                .sblk = &msm8996_pp_sblk,
                .intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11),
                .intr_rdptr = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 15),
index df1eeb9082f74ab734c235f0cd0baf8c0eda14b5..75b679cd2bd27dd25971489a2d3a6f516b248235 100644 (file)
 #define MIXER_QCM2290_MASK \
        (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))
 
-#define PINGPONG_MSM8996_MASK \
-       (BIT(DPU_PINGPONG_DSC))
-
 #define PINGPONG_SDM845_MASK \
-       (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC))
+       (BIT(DPU_PINGPONG_DITHER))
 
 #define PINGPONG_SM8150_MASK \
-       (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC))
+       (BIT(DPU_PINGPONG_DITHER))
 
 #define WB_SDM845_MASK (BIT(DPU_WB_LINE_MODE) | \
                         BIT(DPU_WB_UBWC) | \
index bc71ec9a5bc8b6e15d7af13c42ba5d4197729822..ac63f753b43615f7c34d2da51fce919fd77142bf 100644 (file)
@@ -118,14 +118,12 @@ enum {
  * @DPU_PINGPONG_SPLIT      PP block supports split fifo
  * @DPU_PINGPONG_SLAVE      PP block is a suitable slave for split fifo
  * @DPU_PINGPONG_DITHER     Dither blocks
- * @DPU_PINGPONG_DSC        PP block supports DSC
  * @DPU_PINGPONG_MAX
  */
 enum {
        DPU_PINGPONG_SPLIT = 0x1,
        DPU_PINGPONG_SLAVE,
        DPU_PINGPONG_DITHER,
-       DPU_PINGPONG_DSC,
        DPU_PINGPONG_MAX
 };
 
index 36c0ec775b92036eaab26e1fa5331579651ac27c..49e03ecee9e8b567a3f809b977deb83731006ac0 100644 (file)
@@ -319,7 +319,7 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(struct drm_device *dev,
                c->ops.disable_autorefresh = dpu_hw_pp_disable_autorefresh;
        }
 
-       if (test_bit(DPU_PINGPONG_DSC, &cfg->features)) {
+       if (mdss_rev->core_major_ver < 7) {
                c->ops.setup_dsc = dpu_hw_pp_setup_dsc;
                c->ops.enable_dsc = dpu_hw_pp_dsc_enable;
                c->ops.disable_dsc = dpu_hw_pp_dsc_disable;