RISC-V: Fix one typo for reduc expand GET_MODE_CLASS

This patch would like to fix one typo when GET_MODE_CLASS by mode.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.

diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index 53bd0ed2534c2435db5c84ab41fc79aaad13511d..b11b544291ad7f3019ae5afe92dbb54e049c6524 100644 (file)
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -1400,7 +1400,7 @@ public:
     machine_mode ret_mode = e.ret_mode ();
 
     /* TODO: we will use ret_mode after all types of PR110265 are addressed.  */
-    if ((GET_MODE_CLASS (MODE) == MODE_VECTOR_FLOAT)
+    if ((GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
        || GET_MODE_INNER (mode) != GET_MODE_INNER (ret_mode))
       return e.use_exact_insn (
        code_for_pred_reduc (CODE, e.vector_mode (), e.vector_mode ()));