static int smu_v13_0_6_ras_send_msg(struct smu_context *smu, enum smu_message_type msg, uint32_t param, uint32_t *read_arg)
{
+ struct amdgpu_device *adev = smu->adev;
int ret;
+ if (amdgpu_sriov_vf(adev))
+ return -EOPNOTSUPP;
+
switch (msg) {
case SMU_MSG_QueryValidMcaCount:
case SMU_MSG_QueryValidMcaCeCount:
case SMU_MSG_McaBankDumpDW:
case SMU_MSG_McaBankCeDumpDW:
case SMU_MSG_ClearMcaOnRead:
+ case SMU_MSG_GetRASTableVersion:
+ case SMU_MSG_GetBadPageCount:
+ case SMU_MSG_GetBadPageMcaAddr:
+ case SMU_MSG_SetTimestamp:
+ case SMU_MSG_GetTimestamp:
+ case SMU_MSG_GetBadPageIpid:
+ case SMU_MSG_EraseRasTable:
ret = smu_cmn_send_smc_msg_with_param(smu, msg, param, read_arg);
break;
default: