powerpc64/bpf: jit support for signed division and modulo

Add jit support for sign division and modulo. Tested using test_bpf
module.

Signed-off-by: Artem Savkov <asavkov@redhat.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20240517075650.248801-6-asavkov@redhat.com

diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 76cc9a2d820659c7771bdcc9fcab7f2af716ce95..b98a9e982c03b4bfa12feb2c0d1c3fd2eb5c13b4 100644 (file)
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -536,6 +536,7 @@
 #define PPC_RAW_MULI(d, a, i)          (0x1c000000 | ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
 #define PPC_RAW_DIVW(d, a, b)          (0x7c0003d6 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))
 #define PPC_RAW_DIVWU(d, a, b)         (0x7c000396 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_RAW_DIVD(d, a, b)          (0x7c0003d2 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))
 #define PPC_RAW_DIVDU(d, a, b)         (0x7c000392 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))
 #define PPC_RAW_DIVDE(t, a, b)         (0x7c000352 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
 #define PPC_RAW_DIVDE_DOT(t, a, b)     (0x7c000352 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | 0x1)

diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c
index 063e5e92f01e9d13e6e74b9c945437034b867cca..2cbcdf93cc197876a983ad79e722fd755865586d 100644 (file)
--- a/arch/powerpc/net/bpf_jit_comp64.c
+++ b/arch/powerpc/net/bpf_jit_comp64.c
@@ -510,20 +510,33 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code
                case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */
                case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */
                        if (BPF_OP(code) == BPF_MOD) {
-                               EMIT(PPC_RAW_DIVWU(tmp1_reg, dst_reg, src_reg));
+                               if (off)
+                                       EMIT(PPC_RAW_DIVW(tmp1_reg, dst_reg, src_reg));
+                               else
+                                       EMIT(PPC_RAW_DIVWU(tmp1_reg, dst_reg, src_reg));
+
                                EMIT(PPC_RAW_MULW(tmp1_reg, src_reg, tmp1_reg));
                                EMIT(PPC_RAW_SUB(dst_reg, dst_reg, tmp1_reg));
                        } else
-                               EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, src_reg));
+                               if (off)
+                                       EMIT(PPC_RAW_DIVW(dst_reg, dst_reg, src_reg));
+                               else
+                                       EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, src_reg));
                        goto bpf_alu32_trunc;
                case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */
                case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */
                        if (BPF_OP(code) == BPF_MOD) {
-                               EMIT(PPC_RAW_DIVDU(tmp1_reg, dst_reg, src_reg));
+                               if (off)
+                                       EMIT(PPC_RAW_DIVD(tmp1_reg, dst_reg, src_reg));
+                               else
+                                       EMIT(PPC_RAW_DIVDU(tmp1_reg, dst_reg, src_reg));
                                EMIT(PPC_RAW_MULD(tmp1_reg, src_reg, tmp1_reg));
                                EMIT(PPC_RAW_SUB(dst_reg, dst_reg, tmp1_reg));
                        } else
-                               EMIT(PPC_RAW_DIVDU(dst_reg, dst_reg, src_reg));
+                               if (off)
+                                       EMIT(PPC_RAW_DIVD(dst_reg, dst_reg, src_reg));
+                               else
+                                       EMIT(PPC_RAW_DIVDU(dst_reg, dst_reg, src_reg));
                        break;
                case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */
                case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */
@@ -544,19 +557,31 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code
                        switch (BPF_CLASS(code)) {
                        case BPF_ALU:
                                if (BPF_OP(code) == BPF_MOD) {
-                                       EMIT(PPC_RAW_DIVWU(tmp2_reg, dst_reg, tmp1_reg));
+                                       if (off)
+                                               EMIT(PPC_RAW_DIVW(tmp2_reg, dst_reg, tmp1_reg));
+                                       else
+                                               EMIT(PPC_RAW_DIVWU(tmp2_reg, dst_reg, tmp1_reg));
                                        EMIT(PPC_RAW_MULW(tmp1_reg, tmp1_reg, tmp2_reg));
                                        EMIT(PPC_RAW_SUB(dst_reg, dst_reg, tmp1_reg));
                                } else
-                                       EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, tmp1_reg));
+                                       if (off)
+                                               EMIT(PPC_RAW_DIVW(dst_reg, dst_reg, tmp1_reg));
+                                       else
+                                               EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, tmp1_reg));
                                break;
                        case BPF_ALU64:
                                if (BPF_OP(code) == BPF_MOD) {
-                                       EMIT(PPC_RAW_DIVDU(tmp2_reg, dst_reg, tmp1_reg));
+                                       if (off)
+                                               EMIT(PPC_RAW_DIVD(tmp2_reg, dst_reg, tmp1_reg));
+                                       else
+                                               EMIT(PPC_RAW_DIVDU(tmp2_reg, dst_reg, tmp1_reg));
                                        EMIT(PPC_RAW_MULD(tmp1_reg, tmp1_reg, tmp2_reg));
                                        EMIT(PPC_RAW_SUB(dst_reg, dst_reg, tmp1_reg));
                                } else
-                                       EMIT(PPC_RAW_DIVDU(dst_reg, dst_reg, tmp1_reg));
+                                       if (off)
+                                               EMIT(PPC_RAW_DIVD(dst_reg, dst_reg, tmp1_reg));
+                                       else
+                                               EMIT(PPC_RAW_DIVDU(dst_reg, dst_reg, tmp1_reg));
                                break;
                        }
                        goto bpf_alu32_trunc;