reg:
const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC
+ clocks:
+ items:
+ - description: RX clock
+ - description: TX clock
+
+ clock-names:
+ items:
+ - const: rx
+ - const: tx
+
resets:
items:
- description:
of this PHY are directly connected to an RJ45 connector.
type: boolean
+ required:
+ - clocks
+ - clock-names
+ - resets
+
properties:
compatible:
enum:
};
};
- |
+ #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
#include <dt-bindings/reset/qcom,gcc-ipq5018.h>
mdio {
compatible = "ethernet-phy-id004d.d0c0";
reg = <7>;
+ clocks = <&gcc GCC_GEPHY_RX_CLK>,
+ <&gcc GCC_GEPHY_TX_CLK>;
+ clock-names = "rx", "tx";
resets = <&gcc GCC_GEPHY_MISC_ARES>;
};
};