drm/msm/dpu: Extract plane splitting into a dedicated function

dpu_plane_atomic_check_nosspp() currently handles both plane
validation and plane splitting. For better simplicity and to
facilitate future refactoring, move the splitting logic into
its own dedicated function.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/711319/
Link: https://lore.kernel.org/r/20260312-msm-next-quad-pipe-split-v19-1-4ffa2b06c996@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index 6ec2e302644959a6db8f74739bf6fd5c2c667d9d..f34a8104e9c216467e6e851009de6b5de23e9a7e 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -818,13 +818,8 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
 {
        int i, ret = 0, min_scale, max_scale;
        struct dpu_plane *pdpu = to_dpu_plane(plane);
-       struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
-       u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate;
        struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
-       struct dpu_sw_pipe_cfg *pipe_cfg;
-       struct dpu_sw_pipe_cfg *r_pipe_cfg;
        struct drm_rect fb_rect = { 0 };
-       uint32_t max_linewidth;
 
        min_scale = FRAC_16_16(1, MAX_UPSCALE_RATIO);
        max_scale = MAX_DOWNSCALE_RATIO << 16;
@@ -847,14 +842,6 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
                return -EINVAL;
        }
 
-       /* move the assignment here, to ease handling to another pairs later */
-       pipe_cfg = &pstate->pipe_cfg[0];
-       r_pipe_cfg = &pstate->pipe_cfg[1];
-       /* state->src is 16.16, src_rect is not */
-       drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);
-
-       pipe_cfg->dst_rect = new_plane_state->dst;
-
        fb_rect.x2 = new_plane_state->fb->width;
        fb_rect.y2 = new_plane_state->fb->height;
 
@@ -876,6 +863,31 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
                if (pstate->layout.plane_pitch[i] > DPU_SSPP_MAX_PITCH_SIZE)
                        return -E2BIG;
 
+       pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
+
+       return 0;
+}
+
+static int dpu_plane_split(struct drm_plane *plane,
+                          struct drm_plane_state *new_plane_state,
+                          const struct drm_crtc_state *crtc_state)
+{
+       struct dpu_plane *pdpu = to_dpu_plane(plane);
+       struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
+       u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate;
+       struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
+       struct dpu_sw_pipe_cfg *pipe_cfg;
+       struct dpu_sw_pipe_cfg *r_pipe_cfg;
+       uint32_t max_linewidth;
+
+       /* move the assignment here, to ease handling to another pairs later */
+       pipe_cfg = &pstate->pipe_cfg[0];
+       r_pipe_cfg = &pstate->pipe_cfg[1];
+       /* state->src is 16.16, src_rect is not */
+       drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);
+
+       pipe_cfg->dst_rect = new_plane_state->dst;
+
        max_linewidth = pdpu->catalog->caps->max_linewidth;
 
        drm_rect_rotate(&pipe_cfg->src_rect,
@@ -907,8 +919,6 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
                                    new_plane_state->fb->width, new_plane_state->fb->height,
                                    new_plane_state->rotation);
 
-       pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
-
        return 0;
 }
 
@@ -1129,6 +1139,10 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
        if (!new_plane_state->visible)
                return 0;
 
+       ret = dpu_plane_split(plane, new_plane_state, crtc_state);
+       if (ret)
+               return ret;
+
        if (!dpu_plane_try_multirect_parallel(pipe, pipe_cfg, r_pipe, r_pipe_cfg,
                                              pipe->sspp,
                                              msm_framebuffer_format(new_plane_state->fb),
@@ -1177,6 +1191,10 @@ static int dpu_plane_virtual_atomic_check(struct drm_plane *plane,
                return 0;
        }
 
+       ret = dpu_plane_split(plane, plane_state, crtc_state);
+       if (ret)
+               return ret;
+
        /*
         * Force resource reallocation if the format of FB or src/dst have
         * changed. We might need to allocate different SSPP or SSPPs for this