]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
phy: amlogic: meson8b-usb2: Use FIELD_PREP instead of _SHIFT macros
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sat, 29 Mar 2025 19:07:11 +0000 (20:07 +0100)
committerVinod Koul <vkoul@kernel.org>
Thu, 10 Apr 2025 13:47:26 +0000 (19:17 +0530)
This simplifies the code by re-using the FIELD_PREP helper. No
functional changes inteded.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20250329190712.858349-2-martin.blumenstingl@googlemail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/amlogic/phy-meson8b-usb2.c

index d63147c41b8c9698d728c627cc58d6a910ad87fd..d9c761b7c15ccbd35e782f39d5906825235d60c0 100644 (file)
@@ -5,6 +5,7 @@
  * Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  */
 
+#include <linux/bitfield.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
@@ -39,9 +40,7 @@
        #define REG_CTRL_TX_BITSTUFF_ENN                BIT(18)
        #define REG_CTRL_COMMON_ON                      BIT(19)
        #define REG_CTRL_REF_CLK_SEL_MASK               GENMASK(21, 20)
-       #define REG_CTRL_REF_CLK_SEL_SHIFT              20
        #define REG_CTRL_FSEL_MASK                      GENMASK(24, 22)
-       #define REG_CTRL_FSEL_SHIFT                     22
        #define REG_CTRL_PORT_RESET                     BIT(25)
        #define REG_CTRL_THREAD_ID_MASK                 GENMASK(31, 26)
 
@@ -170,10 +169,10 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
                           REG_CONFIG_CLK_32k_ALTSEL);
 
        regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK,
-                          0x2 << REG_CTRL_REF_CLK_SEL_SHIFT);
+                          FIELD_PREP(REG_CTRL_REF_CLK_SEL_MASK, 0x2));
 
        regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK,
-                          0x5 << REG_CTRL_FSEL_SHIFT);
+                          FIELD_PREP(REG_CTRL_FSEL_MASK, 0x5));
 
        /* reset the PHY */
        regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET,