mmc: dw_mmc-rockchip: Add memory clock auto-gating support

Per design recommendations, the memory clock can be gated when there
is no in-flight transfer, which helps save power. This feature is
introduced alongside internal phase support, and this patch enables it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index 681354942e9741bc468c5c2958e9faf39dd25001..62c68cda1e2144594c41ade0c3cc7b825a0fc469 100644 (file)
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -19,6 +19,8 @@
 #define RK3288_CLKGEN_DIV              2
 #define SDMMC_TIMING_CON0              0x130
 #define SDMMC_TIMING_CON1              0x134
+#define SDMMC_MISC_CON                 0x138
+#define MEM_CLK_AUTOGATE_ENABLE                BIT(5)
 #define ROCKCHIP_MMC_DELAY_SEL         BIT(10)
 #define ROCKCHIP_MMC_DEGREE_MASK       0x3
 #define ROCKCHIP_MMC_DEGREE_OFFSET     1
@@ -470,6 +472,7 @@ static int dw_mci_rk3576_parse_dt(struct dw_mci *host)
 
 static int dw_mci_rockchip_init(struct dw_mci *host)
 {
+       struct dw_mci_rockchip_priv_data *priv = host->priv;
        int ret, i;
 
        /* It is slot 8 on Rockchip SoCs */
@@ -494,6 +497,9 @@ static int dw_mci_rockchip_init(struct dw_mci *host)
                        dev_warn(host->dev, "no valid minimum freq: %d\n", ret);
        }
 
+       if (priv->internal_phase)
+               mci_writel(host, MISC_CON, MEM_CLK_AUTOGATE_ENABLE);
+
        return 0;
 }