Fix SPARC atomic_write_barrier.

diff --git a/ChangeLog b/ChangeLog
index ef67160e1b0d82cb9e0837ab21c2c426f73db8a4..41bfbe77fde6d6aa215b06b71e48e7dac9ecce97 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,12 @@
+2014-10-31  Torvald Riegel  <triegel@redhat.com>
+
+       * sysdeps/sparc/sparc32/bits/atomic.h (atomic_write_barrier): Use
+       correct barrier instruction.
+       * sysdeps/sparc/sparc32/sparcv9/bits/atomic.h (atomic_write_barrier):
+       Likewise.
+       * sysdeps/sparc/sparc64/bits/atomic.h (atomic_write_barrier):
+       Likewise.
+
 2014-10-30  Roland McGrath  <roland@hack.frob.com>
 
        * include/ctype.h: Include <ctype/ctype.h> first thing rather than

diff --git a/sysdeps/sparc/sparc32/bits/atomic.h b/sysdeps/sparc/sparc32/bits/atomic.h
index 39c2b376551e6ed9e28e2041d502deb742deee5d..251e65662d61c3997a35073b0e8d8eff479f46cf 100644 (file)
--- a/sysdeps/sparc/sparc32/bits/atomic.h
+++ b/sysdeps/sparc/sparc32/bits/atomic.h
@@ -343,8 +343,8 @@ extern uint64_t _dl_hwcap __attribute__((weak));
 #define atomic_write_barrier()                                         \
   do {                                                                 \
      if (__atomic_is_v9)                                               \
-       /* membar  #StoreLoad | #StoreStore */                          \
-       __asm __volatile (".word 0x8143e00a" : : : "memory");           \
+       /* membar  #LoadStore | #StoreStore */                          \
+       __asm __volatile (".word 0x8143e00c" : : : "memory");           \
      else                                                              \
        __asm __volatile ("" : : : "memory");                           \
   } while (0)

diff --git a/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h b/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
index 4835019202fcf5f730ecb0a2833b67e111831a3a..310e6365e9daa4b34bd3a18c9053005275abb112 100644 (file)
--- a/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
+++ b/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
@@ -96,4 +96,4 @@ typedef uintmax_t uatomic_max_t;
 #define atomic_read_barrier() \
   __asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
 #define atomic_write_barrier() \
-  __asm __volatile ("membar #StoreLoad | #StoreStore" : : : "memory")
+  __asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")

diff --git a/sysdeps/sparc/sparc64/bits/atomic.h b/sysdeps/sparc/sparc64/bits/atomic.h
index ad9dae1d0fd761cfde4a8c6181195e8c954696e0..d348ed20ae2b140aa9c06831510515a8b07cf997 100644 (file)
--- a/sysdeps/sparc/sparc64/bits/atomic.h
+++ b/sysdeps/sparc/sparc64/bits/atomic.h
@@ -117,4 +117,4 @@ typedef uintmax_t uatomic_max_t;
 #define atomic_read_barrier() \
   __asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
 #define atomic_write_barrier() \
-  __asm __volatile ("membar #StoreLoad | #StoreStore" : : : "memory")
+  __asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")