Vectorization of bit-precision inductions isn't implemented but we
don't check this, instead we ICE during transform.
PR tree-optimization/112505
* tree-vect-loop.c (vectorizable_induction): Reject
bit-precision induction.
* gcc.dg/vect/pr112505.c: New testcase.
(cherry picked from commit
ec345df53556ec581590347f71c3d9ff3cdbca76)
--- /dev/null
+/* { dg-do compile } */
+/* { dg-additional-options "-O3" } */
+
+short int w9;
+struct T {
+ short a : 14;
+ int b;
+};
+struct T v;
+void zc()
+{
+ for(int i = 0; i < 4; i ++)
+ w9 *= v.b ? v.a-- < 0 : 0;
+}
step_expr = STMT_VINFO_LOOP_PHI_EVOLUTION_PART (stmt_info);
gcc_assert (step_expr != NULL_TREE);
+ if (INTEGRAL_TYPE_P (TREE_TYPE (step_expr))
+ && !type_has_mode_precision_p (TREE_TYPE (step_expr)))
+ {
+ if (dump_enabled_p ())
+ dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+ "bit-precision induction vectorization not "
+ "supported.\n");
+ return false;
+ }
tree step_vectype = get_same_sized_vectype (TREE_TYPE (step_expr), vectype);
/* Check for backend support of PLUS/MINUS_EXPR. */