VCPU_REGS_RSI = __VCPU_REGS_RSI,
VCPU_REGS_RDI = __VCPU_REGS_RDI,
#ifdef CONFIG_X86_64
- VCPU_REGS_R8 = __VCPU_REGS_R8,
- VCPU_REGS_R9 = __VCPU_REGS_R9,
- VCPU_REGS_R10 = __VCPU_REGS_R10,
- VCPU_REGS_R11 = __VCPU_REGS_R11,
- VCPU_REGS_R12 = __VCPU_REGS_R12,
- VCPU_REGS_R13 = __VCPU_REGS_R13,
- VCPU_REGS_R14 = __VCPU_REGS_R14,
- VCPU_REGS_R15 = __VCPU_REGS_R15,
+ VCPU_REGS_R8 = 8,
+ VCPU_REGS_R9,
+ VCPU_REGS_R10,
+ VCPU_REGS_R11,
+ VCPU_REGS_R12,
+ VCPU_REGS_R13,
+ VCPU_REGS_R14,
+ VCPU_REGS_R15,
#endif
- VCPU_REGS_RIP,
- NR_VCPU_REGS,
+ NR_VCPU_GENERAL_PURPOSE_REGS,
- VCPU_EXREG_PDPTR = NR_VCPU_REGS,
- VCPU_EXREG_CR0,
+ VCPU_REG_RIP = NR_VCPU_GENERAL_PURPOSE_REGS,
+
+ VCPU_REG_PDPTR,
+ VCPU_REG_CR0,
/*
* Alias AMD's ERAPS (not a real register) to CR3 so that common code
* can trigger emulation of the RAP (Return Address Predictor) with