#define PHY_CTRL_TYPE_C22 0
#define PHY_CTRL_CMD BIT(0)
#define PHY_CTRL_FAIL BIT(25)
-#define SMI_ACCESS_PHY_CTRL_2 0xcb78
+#define RTL9300_SMI_ACCESS_PHY_CTRL_2 0xcb78
#define PHY_CTRL_INDATA GENMASK(31, 16)
#define PHY_CTRL_DATA GENMASK(15, 0)
#define RTL9300_SMI_ACCESS_PHY_CTRL_3 0xcb7c
struct otto_emdio_cmd_regs {
u32 c22_data;
u32 c45_data;
+ u32 io_data;
};
struct otto_emdio_info {
{
struct otto_emdio_chan *chan = bus->priv;
struct otto_emdio_priv *priv;
+ u32 io_reg, cmd_reg, val;
struct regmap *regmap;
- u32 cmd_reg, val;
int port;
int err;
priv = chan->priv;
regmap = priv->regmap;
+ io_reg = priv->info->cmd_regs.io_data;
cmd_reg = priv->info->cmd_regs.c22_data; /* shared command/C22 register */
port = otto_emdio_phy_to_port(bus, phy_id);
if (err)
goto out_err;
- err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, FIELD_PREP(PHY_CTRL_INDATA, port));
+ err = regmap_write(regmap, io_reg, FIELD_PREP(PHY_CTRL_INDATA, port));
if (err)
goto out_err;
if (err)
goto out_err;
- err = regmap_read(regmap, SMI_ACCESS_PHY_CTRL_2, &val);
+ err = regmap_read(regmap, io_reg, &val);
if (err)
goto out_err;
{
struct otto_emdio_chan *chan = bus->priv;
struct otto_emdio_priv *priv;
+ u32 io_reg, cmd_reg, val;
struct regmap *regmap;
- u32 cmd_reg, val;
int port;
int err;
priv = chan->priv;
regmap = priv->regmap;
+ io_reg = priv->info->cmd_regs.io_data;
cmd_reg = priv->info->cmd_regs.c22_data; /* shared command/C22 register */
port = otto_emdio_phy_to_port(bus, phy_id);
if (err)
goto out_err;
- err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, FIELD_PREP(PHY_CTRL_INDATA, value));
+ err = regmap_write(regmap, io_reg, FIELD_PREP(PHY_CTRL_INDATA, value));
if (err)
goto out_err;
{
struct otto_emdio_chan *chan = bus->priv;
struct otto_emdio_priv *priv;
+ u32 io_reg, cmd_reg, val;
struct regmap *regmap;
- u32 cmd_reg, val;
int port;
int err;
priv = chan->priv;
regmap = priv->regmap;
+ io_reg = priv->info->cmd_regs.io_data;
cmd_reg = priv->info->cmd_regs.c22_data; /* shared command/C22 register */
port = otto_emdio_phy_to_port(bus, phy_id);
goto out_err;
val = FIELD_PREP(PHY_CTRL_INDATA, port);
- err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, val);
+ err = regmap_write(regmap, io_reg, val);
if (err)
goto out_err;
if (err)
goto out_err;
- err = regmap_read(regmap, SMI_ACCESS_PHY_CTRL_2, &val);
+ err = regmap_read(regmap, io_reg, &val);
if (err)
goto out_err;
{
struct otto_emdio_chan *chan = bus->priv;
struct otto_emdio_priv *priv;
+ u32 io_reg, cmd_reg, val;
struct regmap *regmap;
- u32 cmd_reg, val;
int port;
int err;
priv = chan->priv;
regmap = priv->regmap;
+ io_reg = priv->info->cmd_regs.io_data;
cmd_reg = priv->info->cmd_regs.c22_data; /* shared command/C22 register */
port = otto_emdio_phy_to_port(bus, phy_id);
goto out_err;
val = FIELD_PREP(PHY_CTRL_INDATA, value);
- err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, val);
+ err = regmap_write(regmap, io_reg, val);
if (err)
goto out_err;
.cmd_regs = {
.c22_data = RTL9300_SMI_ACCESS_PHY_CTRL_1,
.c45_data = RTL9300_SMI_ACCESS_PHY_CTRL_3,
+ .io_data = RTL9300_SMI_ACCESS_PHY_CTRL_2,
},
.num_buses = RTL9300_NUM_BUSES,
.num_ports = RTL9300_NUM_PORTS,