rockchip: dt: add overclocked NanoPi R2S

Signed-off-by: Arne Fitzenreiter <arne_f@ipfire.org>

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 20908e47e446763a4653ce7b05c66eb0108708c8..58fc1f11f0a22e41a7240624961eb0f3f88496ef 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-oc.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb

diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-oc.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-oc.dts
new file mode 100644 (file)
index 0000000..a614acb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-oc.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * overclock Nanopi R2S to 1.5 Ghz
+ */
+
+/dts-v1/;
+
+#include "rk3328-nanopi-r2s.dts"
+
+/ {
+       model = "FriendlyElec NanoPi R2S OC";
+
+       cpu0_opp_table: opp_table0 {
+               opp-1392000000 {
+                       opp-hz = /bits/ 64 <1392000000>;
+                       opp-microvolt = <1350000>;
+                       clock-latency-ns = <40000>;
+               };
+               opp-1512000000 {
+                       opp-hz = /bits/ 64 <1512000000>;
+                       opp-microvolt = <1400000>;
+                       clock-latency-ns = <40000>;
+               };
+       };
+};