--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ compatible = "devolo,rac", "ralink,mt7620a-soc";
+ model = "devolo WiFi Repeater ac";
+
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset_wps {
+ label = "reset_wps";
+ gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ switch_high {
+ label = "switch high";
+ gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
+ linux,code = <BTN_0>;
+ linux,input-type = <EV_SW>;
+ };
+
+ switch_off {
+ label = "switch off";
+ gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
+ linux,code = <BTN_1>;
+ linux,input-type = <EV_SW>;
+ };
+ };
+
+ leds {
+
+ compatible = "gpio-leds";
+
+ led_power: power {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
+ };
+
+ led2 {
+ function = LED_FUNCTION_WLAN_5GHZ;
+ color = <LED_COLOR_ID_WHITE>;
+ function-enumerator = <0>;
+ gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0radio";
+ };
+
+ led3 {
+ function = LED_FUNCTION_WLAN_5GHZ;
+ color = <LED_COLOR_ID_WHITE>;
+ function-enumerator = <1>;
+ gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0radio";
+ };
+
+ led4 {
+ function = LED_FUNCTION_WLAN_2GHZ;
+ color = <LED_COLOR_ID_WHITE>;
+ function-enumerator = <0>;
+ gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1radio";
+ };
+
+ led5 {
+ function = LED_FUNCTION_WLAN_2GHZ;
+ color = <LED_COLOR_ID_WHITE>;
+ function-enumerator = <1>;
+ gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1radio";
+ };
+ };
+};
+
+&gpio2 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x30000>;
+ read-only;
+ };
+
+ partition@30000 {
+ label = "u-boot-env";
+ reg = <0x30000 0x10000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "factory";
+ reg = <0x40000 0x10000>;
+ read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_factory_0: eeprom@0 {
+ reg = <0x0 0x200>;
+ };
+
+ eeprom_factory_8000: eeprom@8000 {
+ reg = <0x8000 0x200>;
+ };
+
+ macaddr_factory_4: macaddr@4 {
+ compatible = "mac-base";
+ reg = <0x4 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+ };
+ };
+
+ partition@50000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x50000 0x7b0000>;
+ };
+ };
+ };
+};
+
+&state_default {
+ gpio {
+ groups = "i2c", "uartf", "nd_sd", "rgmii2";
+ function = "gpio";
+ };
+};
+
+&pinctrl {
+ phy_reset_pins: phy-reset {
+ gpio {
+ groups = "spi refclk";
+ function = "gpio";
+ };
+ };
+};
+
+ðernet {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii1_pins>,<&mdio_pins>;
+
+ nvmem-cells = <&macaddr_factory_4 0>;
+ nvmem-cell-names = "mac-address";
+
+ port@5 {
+ status = "okay";
+ mediatek,fixed-link = <1000 1 1 1>;
+ phy-mode = "rgmii";
+ };
+};
+
+&gsw {
+ mediatek,ephy-base = /bits/ 8 <8>;
+};
+
+&wmac {
+ nvmem-cells = <&eeprom_factory_0>;
+ nvmem-cell-names = "eeprom";
+};
+
+&pcie {
+ status = "okay";
+};
+
+&pcie0 {
+ wifi@0,0 {
+ compatible = "mediatek,mt76";
+ reg = <0x0000 0 0 0 0>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_4 2>;
+ nvmem-cell-names = "eeprom", "mac-address";
+ };
+};