]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
realtek: Split Zyxel GS1900-8 into v1 and v2 17692/head
authorSander Vanheule <sander@svanheule.net>
Wed, 22 Jan 2025 11:25:18 +0000 (12:25 +0100)
committerSander Vanheule <sander@svanheule.net>
Sat, 25 Jan 2025 14:07:13 +0000 (15:07 +0100)
Zyxel GS1900-8 v2 devices have been produced more recently than v1
devices. As there are v1 boards with RTL8380M rev. C SoCs, it can likely
safely be assumed that all v2 devices will also have a recent SoC
revision, supporting the hardware auxiliary MDIO controller.

Make the GS1900-8 v1 use an emulated auxiliary MDIO bus, for backward
compatibility with devices containing an RTL8380M rev. A.

Since the devicetrees are otherwise identical, GS1900-8 v1 devices with
an RTL8380M rev. B or C will also be able to use the (more efficient) v2
image. This includes any currently functioning device with OpenWrt, so
include the old compatible as a supported device for the GS1900-8 v2.

Link: https://github.com/openwrt/openwrt/issues/9534
Signed-off-by: Sander Vanheule <sander@svanheule.net>
target/linux/realtek/base-files/etc/board.d/05_compat-version
target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts [new file with mode: 0644]
target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v2.dts [moved from target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts with 64% similarity]
target/linux/realtek/image/rtl838x.mk

index 9c27314b241e4e28dde142b1862d7306426702ff..52dbdc627edfc0fbae24a34d115e9f4b86b3f044 100644 (file)
@@ -13,7 +13,8 @@ case "$(board_name)" in
        hpe,1920-24g-poe-370w)
                ucidef_set_compat_version "1.1"
        ;;
-       zyxel,gs1900-8 | \
+       zyxel,gs1900-8-v1 | \
+       zyxel,gs1900-8-v2 | \
        zyxel,gs1900-8hp-v1 | \
        zyxel,gs1900-8hp-v2 | \
        zyxel,gs1900-10hp | \
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts
new file mode 100644 (file)
index 0000000..9838c02
--- /dev/null
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio_emulated.dtsi"
+
+/ {
+       compatible = "zyxel,gs1900-8-v1", "realtek,rtl838x-soc";
+       model = "Zyxel GS1900-8 v1 Switch";
+};
+
+&gpio1 {
+       /delete-node/ poe_enable;
+};
similarity index 64%
rename from target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts
rename to target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v2.dts
index 1d76f55d6a1640293aa37b0888c7336b1d8dee3a..84f87ea03749f7650eefd8a1e4a47714d4f1fdda 100644 (file)
@@ -4,8 +4,8 @@
 #include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
-       compatible = "zyxel,gs1900-8", "realtek,rtl838x-soc";
-       model = "Zyxel GS1900-8v1/v2 Switch";
+       compatible = "zyxel,gs1900-8-v2", "realtek,rtl838x-soc";
+       model = "Zyxel GS1900-8 v2 Switch";
 };
 
 &gpio1 {
index 0d6acd483afb38cfdef6920259621f0861af06f6..3763418233e8298ee4bef98e3c9c92fad34eb4c6 100644 (file)
@@ -360,17 +360,25 @@ define Device/zyxel_gs1900-16
 endef
 TARGET_DEVICES += zyxel_gs1900-16
 
-define Device/zyxel_gs1900-8
+define Device/zyxel_gs1900-8-v1
   $(Device/zyxel_gs1900)
   SOC := rtl8380
   DEVICE_MODEL := GS1900-8
   DEVICE_VARIANT := v1
-  DEVICE_ALT0_VENDOR := Zyxel
-  DEVICE_ALT0_MODEL := GS1900-8
-  DEVICE_ALT0_VARIANT := v2
   ZYXEL_VERS := AAHH
+  SUPPORTED_DEVICES += zyxel,gs1900-8
 endef
-TARGET_DEVICES += zyxel_gs1900-8
+TARGET_DEVICES += zyxel_gs1900-8-v1
+
+define Device/zyxel_gs1900-8-v2
+  $(Device/zyxel_gs1900)
+  SOC := rtl8380
+  DEVICE_MODEL := GS1900-8
+  DEVICE_VARIANT := v2
+  ZYXEL_VERS := AAHH
+  SUPPORTED_DEVICES += zyxel,gs1900-8
+endef
+TARGET_DEVICES += zyxel_gs1900-8-v2
 
 define Device/zyxel_gs1900-8hp-v1
   $(Device/zyxel_gs1900)