--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -200,6 +200,18 @@
- clocks = <&gcc GCC_MDIO0_AHB_CLK>;
+@@ -210,6 +210,22 @@
+ clocks = <&gcc GCC_MDIO1_AHB_CLK>;
clock-names = "gcc_mdio_ahb_clk";
status = "disabled";
+
+ ge_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-id004d.d0c0";
+ reg = <7>;
++
++ clocks = <&gcc GCC_GEPHY_RX_CLK>,
++ <&gcc GCC_GEPHY_TX_CLK>;
++
+ resets = <&gcc GCC_GEPHY_BCR>,
+ <&gcc GCC_GEPHY_MDC_SW_ARES>,
+ <&gcc GCC_GEPHY_DSP_HW_ARES>,
+ <&gcc GCC_GEPHY_RX_ARES>,
+ <&gcc GCC_GEPHY_TX_ARES>;
-+ clocks = <&gcc GCC_GEPHY_RX_CLK>,
-+ <&gcc GCC_GEPHY_TX_CLK>;
++
++ #clock-cells = <1>;
+ };
};
- mdio1: mdio@90000 {
-@@ -394,8 +406,8 @@
+ cmn_pll: clock-controller@9b000 {
+@@ -394,8 +410,8 @@
<&pcie0_phy>,
<&pcie1_phy>,
<0>,