]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
qualcommax: ipq50xx: fix ipq5018 GE PHY and tidy up mdio nodes 18634/head
authorGeorge Moussalem <george.moussalem@outlook.com>
Tue, 29 Apr 2025 10:32:20 +0000 (14:32 +0400)
committerRobert Marko <robimarko@gmail.com>
Tue, 29 Apr 2025 12:54:59 +0000 (14:54 +0200)
As part of the previous commit to add the #clock-cells property to the
GE PHY, the PHY was inadvertently moved under the second mdio node in
the dtsi, and therefore broke the init sequence as the driver was trying
to use the wrong mdio bus to set the init values (ex. DAC, MSE, and AZ).
So let's move it back under the right mdio node and, while at it, pad
the register addresses to 8 hex numbers and re-order properties in line
with Linux DTS coding standards.

Fixes: 6782d0e66fd607a3536d5fd94e998d2d700ffeaf
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18634
Signed-off-by: Robert Marko <robimarko@gmail.com>
target/linux/qualcommax/patches-6.6/0712-arm64-dts-qcom-ipq5018-add-mdio-node.patch
target/linux/qualcommax/patches-6.6/0713-arm64-dts-qcom-ipq5018-add-ge_phy-node.patch
target/linux/qualcommax/patches-6.6/0816-arm64-dts-qcom-ipq5018-add-wifi-support.patch

index ce5367a08542ab23e9806503c6d369e1401458e1..c431383a8bbeed54f61e8ec850714a9b867807d3 100644 (file)
@@ -14,27 +14,31 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -192,6 +192,26 @@
+@@ -192,6 +192,30 @@
                        status = "disabled";
                };
  
 +              mdio0: mdio@88000 {
++                      compatible = "qcom,ipq5018-mdio", "qcom,qca-mdio";
++                      reg = <0x00088000 0x64>;
 +                      #address-cells = <1>;
 +                      #size-cells = <0>;
-+                      compatible = "qcom,ipq5018-mdio", "qcom,qca-mdio";
-+                      reg = <0x88000 0x64>;
++
 +                      clocks = <&gcc GCC_MDIO0_AHB_CLK>;
 +                      clock-names = "gcc_mdio_ahb_clk";
++
 +                      status = "disabled";
 +              };
 +
 +              mdio1: mdio@90000 {
++                      compatible = "qcom,ipq5018-mdio";
++                      reg = <0x00090000 0x64>;
 +                      #address-cells = <1>;
 +                      #size-cells = <0>;
-+                      compatible = "qcom,ipq5018-mdio";
-+                      reg = <0x90000 0x64>;
++
 +                      clocks = <&gcc GCC_MDIO1_AHB_CLK>;
 +                      clock-names = "gcc_mdio_ahb_clk";
++
 +                      status = "disabled";
 +              };
 +
index 29606309e973370999e64cd734b4608ac0318fcc..d72261306d9a49e207414a35ccdc27d41c8916f0 100644 (file)
@@ -13,15 +13,14 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -210,6 +210,22 @@
-                       clocks = <&gcc GCC_MDIO1_AHB_CLK>;
+@@ -202,6 +202,21 @@
                        clock-names = "gcc_mdio_ahb_clk";
                        status = "disabled";
 +
 +                      ge_phy: ethernet-phy@7 {
 +                              compatible = "ethernet-phy-id004d.d0c0";
 +                              reg = <7>;
-+
 +                              clocks = <&gcc GCC_GEPHY_RX_CLK>,
 +                                       <&gcc GCC_GEPHY_TX_CLK>;
 +
@@ -35,8 +34,8 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 +                      };
                };
  
-               cmn_pll: clock-controller@9b000 {
-@@ -394,8 +410,8 @@
+               mdio1: mdio@90000 {
+@@ -398,8 +413,8 @@
                                 <&pcie0_phy>,
                                 <&pcie1_phy>,
                                 <0>,
index 926fd75d91e471fd01e17693cb561b996d2545bb..4c766d6e0d4047a55594d95d58a99a9d931eebca 100644 (file)
@@ -13,7 +13,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 ---
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -696,6 +696,225 @@
+@@ -699,6 +699,225 @@
                        };
                };