From: FUKAUMI Naoki Date: Sun, 23 Jun 2024 02:33:28 +0000 (+0900) Subject: arm64: dts: rockchip: add (but disabled) SFC node for Radxa ROCK 5A X-Git-Tag: v6.11-rc1~188^2~30^2~21 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=00224650dd45e166ea6eb1593f5f064583963ccf;p=thirdparty%2Flinux.git arm64: dts: rockchip: add (but disabled) SFC node for Radxa ROCK 5A This commit adds SFC node for Radxa ROCK 5A. since sdhci and sfc on RK3588s share pins(i.e. exclusive), it cannot be enabled both nodes at the same time. so status = "okay" is omitted here. you may be able to enable sfc (and disable sdhci) by fdt overlay. SPI NOR flash chip may vary, so use safe(lowest) spi-max-frequency. Signed-off-by: FUKAUMI Naoki Link: https://lore.kernel.org/r/20240623023329.1044-2-naoki@radxa.com Signed-off-by: Heiko Stuebner --- diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts index c671a61d3aef5..4cc1790ebd081 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts @@ -376,6 +376,19 @@ status = "okay"; }; +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspim0_pins>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + &spi2 { status = "okay"; assigned-clocks = <&cru CLK_SPI2>;