From: Patrick O'Neill Date: Thu, 5 Oct 2023 23:37:45 +0000 (-0700) Subject: RISC-V: Use stdint-gcc.h in rvv testsuite X-Git-Tag: basepoints/gcc-15~5709 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=00e167fa50d9ade6382d67a275bded891d660d21;p=thirdparty%2Fgcc.git RISC-V: Use stdint-gcc.h in rvv testsuite stdint.h can be replaced with stdint-gcc.h to resolve some missing system headers in non-multilib installations. Tested using glibc rv32gcv and rv64gcv on r14-4381-g7eb5ce7f58e. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-1.h: Replace stdint.h with stdint-gcc.h. * gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-2.h: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-1.h: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-2.h: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-1.h: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-2.h: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-1.h: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-2.h: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_sqrt-1.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_sqrt-2.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_unary-1.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_unary-2.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_unary-3.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_unary-4.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_unary-5.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_unary-6.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_unary-7.c: Ditto. * gcc.target/riscv/rvv/autovec/cond/cond_unary-8.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-8.c: Ditto. * gcc.target/riscv/rvv/autovec/partial/slp-9.c: Ditto. * gcc.target/riscv/rvv/autovec/pr111232.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/cvt-0.c: Ditto. * gcc.target/riscv/rvv/autovec/unop/cvt-1.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm.h: Ditto. * gcc.target/riscv/rvv/base/abi-call-args-4-run.c: Ditto. * gcc.target/riscv/rvv/base/pr110119-2.c: Ditto. * gcc.target/riscv/rvv/vsetvl/pr111255.c: Ditto. * gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c: Ditto. Signed-off-by: Patrick O'Neill --- diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-1.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-1.h index 4742d926af65..36af15b986a7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-1.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-1.h @@ -1,4 +1,4 @@ -#include +#include #define DEF_LOOP(OLD_TYPE, NEW_TYPE) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-2.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-2.h index b084eaae19d4..1aad4a658de9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-2.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-2.h @@ -1,4 +1,4 @@ -#include +#include #define DEF_LOOP(OLD_TYPE, NEW_TYPE) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-1.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-1.h index 2df68aa2d1ea..639adc34c3d8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-1.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-1.h @@ -1,4 +1,4 @@ -#include +#include #define DEF_LOOP(OLD_TYPE, NEW_TYPE) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-2.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-2.h index 9735141faa11..3d518a45cd2f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-2.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-2.h @@ -1,4 +1,4 @@ -#include +#include #define DEF_LOOP(OLD_TYPE, NEW_TYPE) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-1.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-1.h index 5b0baeece41c..1c49e39cad0f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-1.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-1.h @@ -1,4 +1,4 @@ -#include +#include #define DEF_LOOP(OLD_TYPE, NEW_TYPE) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-2.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-2.h index 2177c946de89..640e0db39a3a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-2.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-2.h @@ -1,4 +1,4 @@ -#include +#include #define DEF_LOOP(OLD_TYPE, NEW_TYPE) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-1.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-1.h index c8ef6df399d8..eb820d3fe36e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-1.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-1.h @@ -1,4 +1,4 @@ -#include +#include #define DEF_LOOP(OLD_TYPE, NEW_TYPE) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-2.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-2.h index f53c1b3fde93..5653ef61675e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-2.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-2.h @@ -1,4 +1,4 @@ -#include +#include #define DEF_LOOP(OLD_TYPE, NEW_TYPE) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_sqrt-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_sqrt-1.c index 21219b43d9d9..c7bd37e4f0ea 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_sqrt-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_sqrt-1.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model -ffast-math" } */ -#include +#include #define DEF_LOOP(TYPE, OP) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_sqrt-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_sqrt-2.c index 2fcdc339e70b..c2fb92fbbbfc 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_sqrt-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_sqrt-2.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model -ffast-math" } */ -#include +#include #define DEF_LOOP(TYPE, OP) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-1.c index 8076243f7d4a..cb738a84492f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-1.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model" } */ -#include +#include #define abs(A) ((A) < 0 ? -(A) : (A)) #define neg(A) (-(A)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-2.c index 8e44301ae805..d9fb0865fc7f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-2.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model" } */ -#include +#include #define abs(A) ((A) < 0 ? -(A) : (A)) #define neg(A) (-(A)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-3.c index 6da5b6e42e3c..145839308e58 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-3.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model" } */ -#include +#include #define abs(A) ((A) < 0 ? -(A) : (A)) #define neg(A) (-(A)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-4.c index 5428c289d22f..e120e8f7e2ab 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-4.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model" } */ -#include +#include #define abs(A) ((A) < 0 ? -(A) : (A)) #define neg(A) (-(A)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-5.c index 8e567378d0d9..775e65e7e6aa 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-5.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model" } */ -#include +#include #define abs(A) ((A) < 0 ? -(A) : (A)) #define neg(A) (-(A)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-6.c index 65a36d0e52a4..63314402fbde 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-6.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model" } */ -#include +#include #define abs(A) ((A) < 0 ? -(A) : (A)) #define neg(A) (-(A)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-7.c index 356fe9fc25a0..4847aec49e09 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-7.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model" } */ -#include +#include #define abs(A) ((A) < 0 ? -(A) : (A)) #define neg(A) (-(A)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-8.c index 5208a858882d..ae4d11893c9c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/cond/cond_unary-8.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv_zvfh -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model" } */ -#include +#include #define abs(A) ((A) < 0 ? -(A) : (A)) #define neg(A) (-(A)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-8.c index 2568d6947a20..cf2fd1d656f3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-8.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=scalable -fno-vect-cost-model -fdump-tree-optimized-details" } */ -#include +#include #define VEC_PERM(TYPE) \ TYPE __attribute__ ((noinline, noclone)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-9.c index 7c42438c9d9a..1b99ffd4ffa7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-9.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-additional-options "-march=rv64gcv -mabi=lp64d --param riscv-autovec-preference=scalable -fno-vect-cost-model -fdump-tree-optimized-details" } */ -#include +#include #define VEC_PERM(TYPE) \ TYPE __attribute__ ((noinline, noclone)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111232.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111232.c index de815c5fac9f..edad14021545 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111232.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111232.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable -Ofast -fno-schedule-insns -fno-schedule-insns2" } */ -#include +#include int16_t foo (int8_t *restrict x, int8_t *restrict y, int n) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-0.c index f08c12117239..762b14089943 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-0.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-0.c @@ -2,7 +2,7 @@ /* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O3 -ftree-vectorize -ffast-math -fno-vect-cost-model -fno-schedule-insns -fno-schedule-insns2" } */ /* { dg-final { check-function-bodies "**" "" } } */ -#include +#include /* ** test_int65_to_fp16: diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-1.c index 2d8ba8f45a56..3180ba3612c7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-1.c @@ -2,7 +2,7 @@ /* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O3 -ftree-vectorize -ffast-math -fno-vect-cost-model -fno-schedule-insns -fno-schedule-insns2" } */ /* { dg-final { check-function-bodies "**" "" } } */ -#include +#include /* ** test_uint65_to_fp16: diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/perm.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/perm.h index 18cb4af059b8..1c5e47246515 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/perm.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/perm.h @@ -1,4 +1,4 @@ -#include +#include typedef int8_t vnx2qi __attribute__ ((vector_size (2))); typedef int8_t vnx4qi __attribute__ ((vector_size (4))); diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-4-run.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-4-run.c index 01cd55f1c726..aa28bb7e4772 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-4-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-4-run.c @@ -6,7 +6,7 @@ #include #include #include -#include +#include #include "riscv_vector.h" vint64m8_t diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr110119-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr110119-2.c index 958d1addb055..3dadc9920e62 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr110119-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr110119-2.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=rv64gczve32x -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */ -#include +#include #include "riscv_vector.h" __attribute__ ((noipa)) vint32m1x3_t diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c index 736f6838a501..d667dbc874b3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param riscv-autovec-lmul=m2 -fno-vect-cost-model" } */ -#include +#include #define DEF_LOOP(OLD_TYPE, NEW_TYPE) \ void __attribute__ ((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c index 81a0ebb9f520..5d1126786d39 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c @@ -2,7 +2,7 @@ /* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -O3" } */ -#include +#include int16_t foo (int8_t *restrict a) {