From: Robin Murphy <robin.murphy@arm.com>
Date: Tue, 27 May 2025 12:55:39 +0000 (+0100)
Subject: arm64: dts: morello: Add CMN PMU
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=01a23e376e2afd578c5ecb8c8263e107de3240b9;p=thirdparty%2Fkernel%2Flinux.git

arm64: dts: morello: Add CMN PMU

Although CMN-Skeena is mildly modified for the Morello hardware
architecture, it still identifies itself as CMN-600 r3p1. Since
there are also no documented changes to its PMU functionality,
we can make the PMU accessible via the standard CMN-600 binding.
In general, PMU registers are non-functional on CMN Fast Models,
so this is only meaningful for the real SDP hardware.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Message-Id: <cbeb3832ded539c8c4616d49d3133078a34f88ad.1748350539.git.robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
---

diff --git a/arch/arm64/boot/dts/arm/morello-sdp.dts b/arch/arm64/boot/dts/arm/morello-sdp.dts
index cee49dee75710..42c85f450fa90 100644
--- a/arch/arm64/boot/dts/arm/morello-sdp.dts
+++ b/arch/arm64/boot/dts/arm/morello-sdp.dts
@@ -108,6 +108,13 @@
 		dma-coherent;
 	};
 
+	pmu@50000000 {
+		compatible = "arm,cmn-600";
+		reg = <0x0 0x50000000 0x0 0x4000000>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		arm,root-node = <0x804000>;
+	};
+
 	pcie_ctlr: pcie@28c0000000 {
 		device_type = "pci";
 		compatible = "pci-host-ecam-generic";