From: Uros Bizjak <uros@gcc.gnu.org>
Date: Fri, 17 May 2013 17:50:11 +0000 (+0200)
Subject: backport: re PR target/45359 (poor -march=native choices for VIA C7 Esther processors)
X-Git-Tag: releases/gcc-4.7.4~658
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=01bf4de9e4b77c908cd150a832a657d446dc1c09;p=thirdparty%2Fgcc.git

backport: re PR target/45359 (poor -march=native choices for VIA C7 Esther processors)

	Backport from mainline
	2013-05-16  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/driver-i386.c (host_detect_local_cpu): Determine
	cache parameters using detect_caches_amd also for CYRIX,
	NSC and TM2 signatures.

	2013-05-16  Uros Bizjak  <ubizjak@gmail.com>
		    Dzianis Kahanovich  <mahatma@eu.by>

	PR target/45359
	PR target/46396
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
	VIA/Centaur processors and determine their cache parameters
	using detect_caches_amd.

	2013-05-15  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_option_override_internal): Add
	PTA_POPCNT to corei7 entry.

From-SVN: r199026
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a289c511b602..415e95935d2b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,26 @@
+2013-05-17  Uros Bizjak  <ubizjak@gmail.com>
+
+	Backport from mainline
+	2013-05-16  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/driver-i386.c (host_detect_local_cpu): Determine
+	cache parameters using detect_caches_amd also for CYRIX,
+	NSC and TM2 signatures.
+
+	2013-05-16  Uros Bizjak  <ubizjak@gmail.com>
+		    Dzianis Kahanovich  <mahatma@eu.by>
+
+	PR target/45359
+	PR target/46396
+	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
+	VIA/Centaur processors and determine their cache parameters
+	using detect_caches_amd.
+
+	2013-05-15  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.c (ix86_option_override_internal): Add
+	PTA_POPCNT to corei7 entry.
+
 2013-05-14  Richard Biener  <rguenther@suse.de>
 
 	PR gcov-profile/57269
@@ -60,7 +83,7 @@
 
 2013-05-10  Ralf Corsépius  <ralf.corsepius@rtems.org>
 
-	PR target/57237	
+	PR target/57237
 	* config/v850/t-rtems: Add more multilibs.
 
 2013-05-07  Michael Meissner  <meissner@linux.vnet.ibm.com>
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 7b5e4d7c145e..64bae0de6899 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -350,7 +350,10 @@ detect_caches_intel (bool xeon_mp, unsigned max_level,
 enum vendor_signatures
 {
   SIG_INTEL =	0x756e6547 /* Genu */,
-  SIG_AMD =	0x68747541 /* Auth */
+  SIG_AMD =	0x68747541 /* Auth */,
+  SIG_CENTAUR =	0x746e6543 /* Cent */,
+  SIG_CYRIX =	0x69727943 /* Cyri */,
+  SIG_NSC =	0x646f6547 /* Geod */
 };
 
 enum processor_signatures
@@ -510,7 +513,10 @@ const char *host_detect_local_cpu (int argc, const char **argv)
 
   if (!arch)
     {
-      if (vendor == SIG_AMD)
+      if (vendor == SIG_AMD
+	  || vendor == SIG_CENTAUR
+	  || vendor == SIG_CYRIX
+	  || vendor == SIG_NSC)
 	cache = detect_caches_amd (ext_level);
       else if (vendor == SIG_INTEL)
 	{
@@ -549,6 +555,37 @@ const char *host_detect_local_cpu (int argc, const char **argv)
       else
 	processor = PROCESSOR_PENTIUM;
     }
+  else if (vendor == SIG_CENTAUR)
+    {
+      if (arch)
+	{
+	  switch (family)
+	    {
+	    case 6:
+	      if (model > 9)
+		/* Use the default detection procedure.  */
+		processor = PROCESSOR_GENERIC32;
+	      else if (model == 9)
+		cpu = "c3-2";
+	      else if (model >= 6)
+		cpu = "c3";
+	      else
+		processor = PROCESSOR_GENERIC32;
+	      break;
+	    case 5:
+	      if (has_3dnow)
+		cpu = "winchip2";
+	      else if (has_mmx)
+		cpu = "winchip2-c6";
+	      else
+		processor = PROCESSOR_GENERIC32;
+	      break;
+	    default:
+	      /* We have no idea.  */
+	      processor = PROCESSOR_GENERIC32;
+	    }
+	}
+    }
   else
     {
       switch (family)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index cd117d40da03..5bcb7e0db92d 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2979,7 +2979,7 @@ ix86_option_override_internal (bool main_args_p)
 	| PTA_SSSE3 | PTA_CX16},
       {"corei7", PROCESSOR_COREI7_64, CPU_COREI7,
 	PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
-	| PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16},
+	| PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT},
       {"corei7-avx", PROCESSOR_COREI7_64, CPU_COREI7,
 	PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
 	| PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX