From: Russell King (Oracle) Date: Tue, 11 Nov 2025 08:11:52 +0000 (+0000) Subject: net: stmmac: loongson1: use PHY_INTF_SEL_x directly X-Git-Tag: v6.19-rc1~170^2~178^2~11 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=031f7a05d4b3ad4414e646414e16dfd4ab388772;p=thirdparty%2Fkernel%2Flinux.git net: stmmac: loongson1: use PHY_INTF_SEL_x directly Use the PHY_INTF_SEL_xx values directly in ls1c_dwmac_syscon_init(), converting them to the PHY_INTF_SELI bitfield when calling regmap_update_bits(). Signed-off-by: Russell King (Oracle) Reviewed-by: Maxime Chevallier Link: https://patch.msgid.link/E1vIjTk-0000000Dqt6-1gN9@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c index 09e2af1d778a9..5f9f66fbc1917 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c @@ -38,8 +38,6 @@ #define GMAC_SHUT BIT(6) #define PHY_INTF_SELI GENMASK(30, 28) -#define PHY_INTF_MII FIELD_PREP(PHY_INTF_SELI, PHY_INTF_SEL_GMII_MII) -#define PHY_INTF_RMII FIELD_PREP(PHY_INTF_SELI, PHY_INTF_SEL_RMII) struct ls1x_dwmac { struct plat_stmmacenet_data *plat_dat; @@ -140,15 +138,14 @@ static int ls1c_dwmac_syscon_init(struct platform_device *pdev, void *priv) struct ls1x_dwmac *dwmac = priv; struct plat_stmmacenet_data *plat = dwmac->plat_dat; struct regmap *regmap = dwmac->regmap; + int phy_intf_sel; switch (plat->phy_interface) { case PHY_INTERFACE_MODE_MII: - regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI, - PHY_INTF_MII); + phy_intf_sel = PHY_INTF_SEL_GMII_MII; break; case PHY_INTERFACE_MODE_RMII: - regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI, - PHY_INTF_RMII); + phy_intf_sel = PHY_INTF_SEL_RMII; break; default: dev_err(&pdev->dev, "Unsupported PHY-mode %u\n", @@ -156,6 +153,8 @@ static int ls1c_dwmac_syscon_init(struct platform_device *pdev, void *priv) return -EOPNOTSUPP; } + regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI, + FIELD_PREP(PHY_INTF_SELI, phy_intf_sel)); regmap_update_bits(regmap, LS1X_SYSCON0, GMAC0_SHUT, 0); return 0;