From: Tom Rini <trini@konsulko.com>
Date: Thu, 23 Apr 2026 13:46:01 +0000 (-0600)
Subject: Merge tag 'xilinx-for-v2026.07-rc1-v3' of https://source.denx.de/u-boot/custodians... 
X-Git-Tag: v2026.07-rc1~20
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=03fcc16d580342667da61ac87ecb12c4f1995be7;p=thirdparty%2Fu-boot.git

Merge tag 'xilinx-for-v2026.07-rc1-v3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx/FPGA changes for v2026.07-rc1 v3. The biggest part is new
pcie driver for Versal Gen 2 SOC. Others are small fixes and
adjustments.

versal2:
- Wire PCIe IP

cmd/fpga:
- Fix loadb help text guarding
- Add support for skipping fpga ID check

zynqmp:
- Describe missing devices/IDs
- Fix issue around zu63dr_SE

clk/versal:
- Fix out-of-bounds parent id for DUMMY_PARENT

net/gem:
- Add support for 10GBE
- Clear stale speed bits in NWCFG

net/axi_emac:
- Filter out broadcast and multicast packets

pci:
- Add driver for AMD PCIe IP based on DesignWare core
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03fcc16d580342667da61ac87ecb12c4f1995be7